SC621A Datasheet, PDF (17/24 Pages) Semtech Corporation – Charge Pump, 4 LEDs, 400mA Flash LED, Dual LDOs, and I2C Interface

SC621A
Applications Information (continued)
PCB Layout Considerations
The layout diagram in Figure 1 illustrates a proper
two-layer PCB layout for the SC621A and supporting
components. Following fundamental layout rules is
critical for achieving the performance specified in the
Electrical Characteristics table. The following guidelines
are recommended when developing a PCB layout:
• Place all bypass and decoupling capacitors —
C1, C2, CIN, COUT, CLDO1, CLDO2, and CBYP as
close to the device as possible.
• All charge pump current passes through VIN,
VOUT, and the bucket capacitor connection
pins. Ensure that all connections to these pins
make use of wide traces so that the resistive
drop on each connection is minimized.
• The thermal pad should be connected to the
ground plane using multiple vias to ensure
proper thermal connection for optimal heat
transfer.
GND
GND
• Make all ground connections to a solid
ground plane as shown in the example layout
(Figure 3).
• If a ground layer is not feasible, the following
groupings should be connected:
ƒ PGND — CIN, COUT
ƒ AGND — Ground Pad, CLDO1, CLDO2,
CBYP
• If no ground plane is available, PGND and
AGND should be routed back to the negative
battery terminal as separate signals using thick
traces. Joining the two ground returns at the
terminal prevents large pulsed return currents
from mixing with the low-noise return currents
of the LDOs.
• Both LDO output traces should be made as
wide as possible to minimize resistive losses.
CIN
C1
C2
COUT
C2-
PGND
FL
BL1
BL2
SC621A
LDO1
LDO2
BYP
EN
SDA
CLDO1
CLDO2
CBYP
Figure 2 — Layer 1
Figure 1 — Recommended PCB Layout
Figure 3 — Layer 2
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