SC5010H Datasheet, PDF (17/36 Pages) Semtech Corporation – High Efficiency 8-Channel LED Driver with I2C Interface and Phase-Shifted PWM Dimming

SC5010H
Applications Information (continued)
If any IO pin voltage exceeds the trip voltage, the IO current
sink will be latched off and the FLT will go low. This latch can
be reset by cycling UVLO, VCC or EN. Other LED strings are
unaffected and continue in normal operation. This protec-
tion will be disabled if SCP is tied to VCC.
In many applications, LED strings are connected to the IO
pins through a mechanical connector which cannot support
an electrical connection at specific times. This connection
might cause noise on the IO pins. If this noise is large enough,
it may trigger false SCP mode. In this condition, a ceramic
decoupling capacitors (100pF ~ 8.2nF) between IO pin to
GND can help prevent the SC5010H from entering the pro-
tection mode by false trigger. This feature can be disabled
by connecting SCP pin to VCC pin.
LED Analog Dimming Control
The LED current in SC5010H can be dimmed via the 5-bit
analog dimming register (Register 0x02). The LED current
can be adjusted in 32 steps from 0mA to the maximum
value, determined by the R_ISET resistor.
SC5010H has a unique DAC architecture which allows it to
have excellent LED current accuracy and string-to-string
matching over the entire DAC range.
Analog dimming method can be used in conjunction
with PWM dimming to increase the dimming resolution.
The fast loop response of SC5010H allows the LED current
to transition to a new value within 100µs or so. Please
refer to the graphs in the typical characteristics section.
LED Open-Circuit Protection
If any LED string becomes open, the respective IO pin
voltage will be pulled to GND. Consequently, the internal
COMP node (output of error amplifier) is driven high, which
causes the boost output voltage to increase. The output
voltage will be eventually clamped to a voltage set by the
OVP resistor divider. Under this condition, the faulty string
is latched off and the FLT pin is pulled low. The boost voltage
gets regulated to the voltage required to set all non-faulty
IO pins above 0.9V (typ). The remaining strings remain in
normal operation. The FLT and the fault-out LED current
sink latch-off can be reset by cycling UVLO, VCC or EN.
LED PWM Dimming Control
The SC5010H supports 3 modes of PWM dimming for
controlling the brightness of the LEDs. It provides flexibil-
ity in setting the duty cycle and frequency of the LED
PWM signal. The PWM dimming mode is set through the
device control register (register address: 0x01) DCR [1:0]
bits. Refer to Table 1 for more details.
Mode 1 — PWMI Direct Control
The PWMI input needs to be held high for normal opera-
tion. PWM dimming can be done by cycling the PWMI
input at a given frequency where a “low” on the PWMI
input turns off all IO current sinks and a “high” turns on all
IO current sinks. The PWMI pin can be toggled by external
circuitry to allow PWM dimming. In a typical application,
Table 1 — LED PWM Dimming Control Methods
PWM Dim-
ming Mode
Register
Settings
DCR[1:0]
PWM
Input
Source
PWMI Direct
Control
PWMI Pin
00
Input
PWMI Indirect
Control
(Default
PWMI Pin
01
Input
Option)
I²C
Control
I²C
11
Control
LED PWM Output
PWM Frequency
PWM Duty Cycle
Phase
Shift
Option
Same as the PWMI input
(Range 100 Hz to 30kHz)
Same as the PWMI input
NO
Set via the FREQ Register
(0x05) and FAST_FREQ bit
10kHz (max): FAST_FREQ=0
20kHz(max): FAST_FREQ=1
Same as the duty cycle of the PWMI input
10 bits @ 10kHz output
YES
9 bits @ 20kHz output
Set via the FREQ Register
(0x05) and FAST_FREQ bit
10kHz (max): FAST_FREQ=0
20kHz(max): FAST_FREQ=1
Set via the Duty Cycle Control
Register (0x03, 0x04)
10 bits @ 10kHz output
YES
9 bits @ 20kHz output
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