SC2449 Datasheet, PDF (17/20 Pages) Semtech Corporation – BI PHASE DUAL CONTROLLER

SC2449
POWER MANAGEMENT
Control Loop Design (Cont.)
or
R
1
.
Fo
2
.
F _{x_over}
.
Vo
G _pwm^.V _in^.G _error F _esr
F _o V _bg
when
F _esr< F _o< F _{x_over}
(5) The compensation capacitor is determined by choos-
ing the compensator zero to be about one fifth of the
output filter corner frequency:
Fo
F _{zero 5}
C
1
2 ^.π.R^.F _zero
(6) The final step is to generate the Bode plot, either by
using the simulation model in .ig. 1 or using the equa-
tions provided here with Mathcad. The phase margin
can then be checked using the Bode plot. Usually, this
design procedure ensures a healthy phase margin.
Step 1. Output filter corner frequency
._o = 1.453 KHz
Step 2. ESR zero frequency:
._esr = 2.653 KHz
Step 3. Check the following condition:
F
ers<
F
sw
5
Which is satisfied in this case.
Step 4. Choose crossover frequency and calculate
compensator R:
._{x_over} = 30 KHz
R = 5.89 KΩ
Step 5. Calculate the compensator C:
An example is given below to demonstrate the proce-
dure introduced above. The parameters of the power
supply are given as:
V _in := 24 V
V _o := 2.5 V
C = 92.98 n.
Step 6. Generate Bode plot and check the phase
margin. In this case, the phase margin is about 85°C
that ensures the loop stability. .ig. 2 shows the Bode
plot of the loop.
I _o := 20 A
F _sw := 150 KHz
L := 4 µH
C _o := 3000 µF
R _c := 0.02 Ω
R ₁ := 1.5 KΩ
R ₂ := 1.0 KΩ
 2002 Semtech Corp.
17
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