SC4905A_16 Datasheet, PDF (10/24 Pages) Semtech Corporation – High Performance Voltage Mode PWM Controller

SC4905A/B
POWER MANAGEMENT
Application Information (Cont.)
FEED BACK
GATE DRIVERS
The error signal from the output of an external Error am-
plifier such as SC431 or SC4431 is applied to the invert-
ing input of the PWM comparator at the FB pin either
directly or via an opto coupler for the Isolated applica-
tions. For best stability keep the FB trace length as short
as possible.
REF
R22
1.1k
FB
C30
NA
8
1
7
2
6
3
5
4
MOCD207
4.7nF C36
R24
3.74k
R29
NA
5
C34
0.1u,16V
C35
22n, 16V
Secondary Supply
22pF C31
C32
R25
1nF _100k
1
4
U6
SC4431
Vref
2
Vout
C33
680pF
R26 R23
80.2k 5.1k
R27
9.1k
0
The signal at the FB pin is then compared to the ramp
signal from the RC pin and the OUT gate drive signal is
generated.
Voltages below 600mV at the FB pin, will produce a 0%
duty cycle at the OUT drive. Maximum duty cycle is pro-
duced when VFB-600mV>VFF. The FB signal range is from
600mv to 4V.
OVER CURRENT
A pulse by pulse current limit is provided by the SC4905.
The current information is sensed at the ILIM pin and
compared to a peak current limit level of 180mV. If the
180mV limit is exceeded, the OUT pulse is terminated.
REF VDD
R13
SC4905
0
U1
C17
1 _VDD
REF ¹⁰ _C22
2 _FB
OUT ⁹
M1
3 _VFF
GND ⁸
4 _DMAX
ILIM ⁷
R17
5 _RC
SYNC ⁶
C26
D15
Rsense ^R30
R11
D7
VDD
SC1301A
C18
35
D8
1
4
D11
U2
2
OUT is a CMOS gate drive output stage that is supplied
from REF and provides a peak source/sink current of
about 1mA. The output stage is capable of driving the
logic input of external MOSFET Drivers and is switched at
the oscillator frequency. When the voltage on the RC pin
is rising,, the output is high.
It should be noted that if high speed/high current drivers
such as the SC1301 are used, careful layout must be
followed in order to minimize stary inductance, which
might cause negative voltages at the output of the driv-
ers. This negative voltage can be clamped to reasonable
level by placing a small Schottky diode directly at the
output of the driver as shown below.
REF VDD
VDD Mosfet Gate
SC4905
R13
SC1301A
U1
C17
C18
35
1 _VDD
REF ¹⁰ _C22
D8
2 _FB
3 _VFF
OUT ⁹
GND ⁸
1
4
D11
4 _DMAX
ILIM ⁷
2 U2
5 _RC
SYNC ⁶
SOFT START
During start up of the converter, the discharged output
capacitor, and the load current demand large supply cur-
rent requirements. To avoid this a soft start scheme is
usually implemented where the duty cycle of the regula-
tor is gradually increased from 0% until the soft start
duration is elapsed.
Programmable soft start duration can implemented ex-
ternally by utilizing a simple external circuitry shown be-
low.
REF
R22
1.1k
3
6
C30
4
5
MOCD207
Csoft start
56.2K
SC4905
U1
1 _VDD
2 _FB
3 _VFF
4 _DMAX
5 _RC
REF
OUT ⁹
GND ⁸
ILIM ⁷
SYNC ⁶
Approximate soft start duration can be calculated as be-
low:
 2006 Semtech Corp.
10
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