SC1186 Datasheet, PDF (10/12 Pages) Semtech Corporation – PROGRAMMABLE SYNCHRONOUS DC/DC CONVERTER, DUAL LOW DROPOUT REGULATOR CONTROLLER

PROGRAMMABLE SYNCHRONOUS DC/DC
CONVERTER, DUAL LOW DROPOUT
REGULATOR CONTROLLER
SC1186
PRELIMINARY - December 2, 1999
COMPONENT SELECTION
fast enough to reduce the voltage dropped across the
ESR at a faster rate than the capacitor sags, hence en-
SWITCHING SECTION
suring a good recovery from transient with no additional
OUTPUT CAPACITORS - Selection begins with the
excursions.
most critical component. Because of fast transient load _{We must also be concerned with ripple current in the}
current requirements in modern microprocessor core _{output inductor and a general rule of thumb has been to}
supplies, the output capacitors must supply all transient _{allow 10% of maximum output current as ripple current.}
load current requirements until the current in the output _{Note that most of the output voltage ripple is produced}
inductor ramps up to the new level. Output capacitor _{by the inductor ripple current flowing in the output ca-}
ESR is therefore one of the most important criteria. The _{pacitor ESR. Ripple current can be calculated from:}
maximum ESR can be simply calculated from:
R_ESR
≤
V_t
I_t
Where
I = _LRIPPLE
V_IN
4⋅L⋅ f_OSC
Ripple current allowance will define the minimum per-
mitted inductor value.
V_t = Maximum transient voltage excursion
POWER FETS - The FETs are chosen based on sev-
I_t = Transient current step
eral criteria with probably the most important being
power dissipation and power handling capability.
For example, to meet a 100mV transient limit with a TOP FET - The power dissipation in the top FET is a
10A load step, the output capacitor ESR must be less combination of conduction losses, switching losses and
than 10mΩ. To meet this kind of ESR level, there are ^{bottom FET body diode recovery losses.}
three available capacitor technologies.
a) Conduction losses are simply calculated as:
Each Capacitor
Total
P_COND = I^2O ⋅ R_DS(on) ⋅ δ
Technology
Low ESR Tantalum
OS-CON
Low ESR Aluminum
C ESR Qty. C ESR
(µF) (mΩ) Rqd. (µF) (mΩ)
330
60 6 2000 10
330
25 3 990 8.3
1500
44 5 7500 8.8
where
δ = duty cycle ≈ ^VO
V_IN
b) Switching losses can be estimated by assuming a
switching time, if we assume 100ns then:
The choice of which to use is simply a cost/perfor-
mance issue, with Low ESR Aluminum being the
cheapest, but taking up the most space.
P_SW = I_O ⋅ V_IN ⋅ 10 ^−2
or more generally,
INDUCTOR - Having decided on a suitable type and
value of output capacitor, the maximum allowable
value of inductor can be calculated. Too large an in-
ductor will produce a slow current ramp rate and will
cause the output capacitor to supply more of the tran-
sient load current for longer - leading to an output volt-
age sag below the ESR excursion calculated above.
The maximum inductor value may be calculated from:
( ) L ≤ ^{RESR C}
I_t
V_IN − V_O
P_SW
= ^IO
⋅ V_IN ⋅ (t_r + t _f ) ⋅ f_OSC
4
c) Body diode recovery losses are more difficult to esti-
mate, but to a first approximation, it is reasonable to as-
sume that the stored charge on the bottom FET body
diode will be moved through the top FET as it starts to
turn on. The resulting power dissipation in the top FET
will be:
P_RR = Q _RR ⋅ V_IN ⋅ f_OSC
The calculated maximum inductor value assumes 100% To a first order approximation, it is convenient to only
duty cycle, so some allowance must be made. Choosing consider conduction losses to determine FET suitability.
an inductor value of 50 to 75% of the calculated maxi- For a 5V in; 2.8V out at 14.2A requirement, typical FET
mum will guarantee that the inductor current will ramp losses would be:
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