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SC1162 Datasheet, PDF (10/12 Pages) Semtech Corporation – PROGRAMMABLE SYNCHRONOUS DC/DC CONVERTER WITH LOW DROPOUT REGULATOR CONTROLLER
October 25, 1999
PROGRAMMABLE SYNCHRONOUS DC/DC
CONVERTER WITH LOW DROPOUT
REGULATOR CONTROLLER
SC1162/3
COMPONENT SELECTION
SWITCHING SECTION
OUTPUT CAPACITORS - Selection begins with the
most critical component. Because of fast transient load
current requirements in modern microprocessor core
supplies, the output capacitors must supply all transient
load current requirements until the current in the output
inductor ramps up to the new level. Output capacitor
ESR is therefore one of the most important criteria. The
maximum ESR can be simply calculated from:
R ESR
≤
Vt
It
Where
Vt = Maximum transient voltage excursion
It = Transient current step
For example, to meet a 100mV transient limit with a
10A load step, the output capacitor ESR must be less
than 10mΩ. To meet this kind of ESR level, there are
three available capacitor technologies:
fast enough to reduce the voltage dropped across the
ESR at a faster rate than the capacitor sags, hence en-
suring a good recovery from transient with no additional
excursions.
We must also be concerned with ripple current in the
output inductor and a general rule of thumb has been to
allow 10% of maximum output current as ripple current.
Note that most of the output voltage ripple is produced
by the inductor ripple current flowing in the output capac-
itor ESR. Ripple current can be calculated from:
I = LRIPPLE
4⋅
VIN
L⋅ fOSC
Ripple current allowance will define the minimum permit-
ted inductor value.
POWER FETS - The FETs are chosen based on several
criteria with probably the most important being power
dissipation and power handling capability.
TOP FET - The power dissipation in the top FET is a
combination of conduction losses, switching losses and
bottom FET body diode recovery losses.
a) Conduction losses are simply calculated as:
Each Capacitor
Total
Technology
Low ESR Tantalum
C ESR Qty. C ESR
(µF) (mΩ) Rqd. (µF) (mΩ)
330
60 6 2000 10
OS-CON
330
25 3 990 8.3
Low ESR Aluminum 1500
44 5 7500 8.8
PCOND = IO2 ⋅ RDS (on) ⋅ δ
where
δ = duty cycle ≈ VO
VIN
b) Switching losses can be estimated by assuming a
switching time, if we assume 100ns then:
The choice of which to use is simply a cost /perfor-
mance issue, with Low ESR Aluminum being the
cheapest, but taking up the most space.
PSW = IO ⋅VIN ⋅10 −2
or more generally,
INDUCTOR - Having decided on a suitable type and
value of output capacitor, the maximum allowable
value of inductor can be calculated. Too large an in-
ductor will produce a slow current ramp rate and will
cause the output capacitor to supply more of the tran-
sient load current for longer - leading to an output volt-
age sag below the ESR excursion calculated above.
The maximum inductor value may be calculated from:
( ) L ≤ RESR C
It
VIN − VO
The calculated maximum inductor value assumes 100%
duty cycle, so some allowance must be made. Choosing
an inductor value of 50 to 75% of the calculated maxi-
mum will guarantee that the inductor current will ramp
PSW
=
IO ⋅VIN
⋅ (tr + t f ) ⋅
4
fOSC
c) Body diode recovery losses are more difficult to esti-
mate, but to a first approximation, it is reasonable to as-
sume that the stored charge on the bottom FET body
diode will be moved through the top FET as it starts to
turn on. The resulting power dissipation in the top FET
will be:
PRR = Q RR ⋅ V IN ⋅ f OSC
To a first order approximation, it is convenient to only
consider conduction losses to determine FET suitability.
For a 5V in; 2.8V out at 14.2A requirement, typical FET
losses would be:
© 1999 SEMTECH CORP.
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