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SLVU28-4 Datasheet, PDF (1/8 Pages) Protek Devices – ULTRA LOW CAPACITANCE TVS ARRAY
PROTECTION PRODUCTS
Description
The SLV series of transient voltage suppressors are
designed to protect low voltage, state-of-the-art CMOS
semiconductors from transients caused by electro-
static discharge (ESD), cable discharge events (CDE),
lightning and other induced voltage surges.
The devices are constructed using Semtech’s propri-
etary EPD process technology. The EPD process pro-
vides low standoff voltages with significant reductions
in leakage currents and capacitance over silicon-
avalanche diode processes. The SLVU2.8-4 features
integrated low capacitance compensation diodes that
reduce the maximum capacitance to <8pF per line.
This, combined with low leakage current, means signal
integrity is preserved in high-speed applications such
as 10/100 Ethernet.
The SLVU2.8-4 is in an SO-8 package and may be used
to protect two high-speed line pairs. The “flow-thru”
design minimizes trace inductance and reduces voltage
overshoot associated with ESD events. The low
clamping voltage of the SLVU2.8-4 minimizes the
stress on the protected IC.
The SLV series TVS diodes will meet the surge require-
ments of IEC 61000-4-2, Level 4.
SLVU2.8-4
EPD TVS™ Diode Array
For ESD and Latch-Up Protection
PRELIMINARY
Features
u 400 Watts peak pulse power (tp = 8/20µs)
u Transient protection for high speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (tp = 5/50ns)
IEC 61000-4-5 (Lightning) 24A (tp = 8/20µs)
u Protects two line pairs (four lines)
u Comprehensive pin out for easy board layout
u Low capacitance
u Low leakage current
u Low operating and clamping voltages
u Solid-state EPD TVS process technology
Mechanical Characteristics
u JEDEC SO-8 package
u Molding compound flammability rating: UL 94V-0
u Marking : Part number, date code, logo
u Packaging : Tape and Reel per EIA 481
Applications
u 10/100 Ethernet
u WAN/LAN Equipment
u Switching Systems
u Desktops, Servers, & Notebooks
u Instrumentation
u Base Stations
u Analog Inputs
Circuit Diagram
Schematic & PIN Configuration
Revision 9/2000
SO-8 (Top View)
1
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