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E8403A Datasheet, PDF (1/1 Pages) Semtech Corporation – 100-500MHz Dual Channel, Digitally Programmed Pin Electronics Solution
TEST AND MEASUREMENT PRODUCTS
Description
E8403A
100-500MHz Dual Channel, Digitally
Programmed Pin Electronics Solution
PRELIMINARY
Features
The E8403A has a Driver and Window Comparator receiver
for each channel with performance settings to save power or
maximize bandwidth.
•
Two Fully Integrated Pin Channels including:
- 16-bit DACs for each level
- Tri-level Driver
- Window Receiver
All level’s DACs for the Driver and Receiver are on-chip
and are programmed via a high speed serial bus. Each of
the level’s DACs have offset and gain registers for on-chip
calibrations.
•
•
•
- Waveform Clamps
Driver, Comparator maximum 8V span over -2 to
+7V range
Configurable Output Protection
50MHz Serial Bus Programming
The Driver circuit is capable of forcing two levels to the DUT
(DVH and DVL) as well as a third voltage for a termination
level (DVT) to terminate high-speed DUT signals to the Com-
parator receivers into a high quality 50Ω load. The Driver
can also be configured to a high impedance (HiZ) state for
an open termination of DUT signals.
•
•
- SPI™/QSPI™/ MICROWIRE™
- Daisy-chainable
Power Dissipation
~0.8W/Channel (quiescent, low performance, I/O Mode)
~0.9W/Channel (quiescent, high performance, I/O Mode)
Pin and Software Compatible with E8400, E8404,
E8405, E8410 and E8415
Waveform clamps are also available to clip the input signals
from a DUT when not using the Driver as a termination.
The clamps prevent reflections from returning to the DUT
transmission line which can create timing errors and false
•
•
•
•
Digitally Programmable Performance/Power
Differential Drive and Receive Functionality
Optimal Small Swing Performance
Small 11mm x 11mm Package
triggering.
All of the on-chip DAC levels and configuration registers
for each channel may be programmed via SET commands.
This PinCast method of programming allows all channels in
a system to be programmed concurrently with a simple set
command whereby any pin channel that had been assigned
to that set will respond.
The two driver circuits may be placed into a differential drive
mode. This reduces driver-to-driver skews to levels difficult to
achieve by external deskewing. The two window comparators
may also be placed into a differential receive mode. These
features enable higher quality testing of differential signals
to/from the DUT.
Applications
• Logic Testers
• Mixed-Signal Test Equipment
• Memory Testers
• Flash Memory Testers
• ASIC Verifiers
SPI and QSPI and trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Functional Block Diagram
DC
BUSY*
CS*
CLK
C
O
N
SDIN
T
SDOUT
R
RESET*
O
INT*
L
SLEEP*
TEST_MODE
DHI*
DHI
DEN
DEN*
QA*
QA
QB
QB*
REF_IN_HI
REF_IN_LO
QB*
QB
QA
QA*
DHI*
DHI
DEN
DEN*
GND_SNS
DVH
DVT
DVL
CVA
A
B
CVB
VCH
VCL
CH 0
CVB
B
A
CVA
DVL
CH 1
VCH
VCL
DVH
DVT
CAL_S[0]
DUTIO_S[0]
DUTIO_F[0]
VCC
VAA
VDD
VEE
GND
ANODE_S
ANODE_F
RREF1[0]
RREF2[0]
RREF1[1]
RREF2[1]
DUTIO_F[1]
DUTIO_S[1]
CAL_S[1]
November 7, 2007

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