SKHI26W Datasheet, PDF (5/6 Pages) Semikron International – Double IGBT driver

SKHI 26W, SKHI 26F
SEMIDRIVER SKHI 26W and SKHI 26F
High Power Double IGBT Driver
Technical Explanations
A. Properties and Functions of the Driver
1. The driver comprises short circuit protection for two
IGBTs in half bridge (pair of arms) connection. If a
single IGBT is driven, output TOP is to be used, and
the terminal C_BOT of output BOT is to be connected to
terminal E_BOT.
2. Short circuit protection is provided by measuring the
collector-emitter voltage. In case of short circuit the
soft turn-off circuit automatically increases the IGBT
turn-off time and hence reduces the DC voltage
overshoot.
3. The IGBTs are turned on by applying a positive
gateemitter voltage of 15 V, and turned off by a
negative gate-emitter voltage of - 8 V. In case of a
failure of the supply voltage the gate-emitter
connection is provided by a 10 kΩ resistor.
4. The driver also comprises the auxiliary power supplies
for the two boosters which are isolated by DC/DC
converters.
11. The typical delay times and propagation times for
signals are
Turn-on: 1,0 + t_TD
Turn-off: 1 µs
Error: 1 µs
input to output
input to output
error input to error signal output
12. In order to optimise the turn-on and turn-off speed
resistors are connected, but external resistors R_g must
be added mainly for parallel connections, according to
the conditions of the given application. External
resistors R_g, R_ex and Rcx should be mounted on
additional circuit board near the paralleled modules.
The R_ex assumes a value of 0,5 Ω and its function is to
avoid the main current to circulate by the auxiliary
emitter which could make the emitter voltage against
ground unbalanced.
The R_cx has a value of 47 Ω and its function is to create
an average of V_CEsat in case of short circuit for
V_CE-monitoring (see Fig. 1).
13. The collectors of the IGBTs are connected to the driver
for monitoring the collector-emitter voltage V_CE.
V_CEmax = 1600 V. When paralleling modules, external
resistors R_cx should be mounted on an additional
board near to the modules.
B. Description of the Circuit Block Diagram
The circuit block diagram (Fig. 1) shows the input on the
left and the output on the right.
5. The two IGBTs of the half bridge are interlocked in
order to prevent them from being in the on-state
simultaneously. The locking time between the turn-off
signal for one IGBT and the release of the turn-on
signal for the other one is typically 3,3 µs (> t_doff).
6. In the case of a short circuit both IGBTs are turned off
immediately. An error memory prevents the IGBTs
from being turned on again. The status of this memory
may be fed back to the control circuit via an open
collector transistor (SKHI 26 W) (error signal). The
error memory is only reset when both input signals are
zero.
7. The nominal voltage of the power supply V_S is +15 V.
Its band of variation is from 14,4 to 15,6 V. The current
required is lower than 700 mA (conditions: 85 °C
temperature, V_S = 15 V). Any undervoltage below
+13 V is monitored, and the IGBTs are turned off. An
error signal is released. Overvoltage is not monitored.
8. The switching signals are transmitted by isolating
pulse transformers. The isolation test voltages
2,5 kV_AC.
The max. dv/dt rating between primary and secondary
side is 75 kV/µs.
9. The input and output signals are CMOS compatible,
for “W” version. The inputs have a Schmitt trigger
characteristic to suppress spurious pulses. The
thresholds of the inputs are
V_iT+ = min. 12,9 V
V_iT-= max. 2,1 V
10. The operating temperature range is 0 ... + 70 °C.
Typ SKHI 26W: T_amb = - 25 °C ... + 85 °C.
The input side comprises the following components:
1. Input Schmitt trigger, CMOS compatible
In the “F” version we have the necessary optic input
buffers respectively ERROR output circuit, to perform
the optical and electrical signals.
2. Interlock circuit
The interlock circuit prevents the IGBT turning on
before the gate charge of the other IGBT is completely
discharged.
3. Short pulse suppression
The short pulse suppression makes sure that only
adequate trigger pulses are transmitted to the output
flip-flop.
4. Error monitoring
This circuit monitors pulses fed backwards via the
pulse transformers.
5. Inhibit pulse generator
In the error monitoring circuit, an inhibit pulse
generator discriminates between switching and error
signals. After any positive switching pulse edge the
error monitoring function is enabled. This is required
since the pulsetransformer causes a negative peak
voltage on its primary during re-magnetization. This
peak voltage would trigger the error monitoring without
the inhibit pulse.
6. Error memory
The error memory is triggered by the error monitoring
circuit. The error memory blocks the turn-on pulses to
both IGBTs simultaneously. Resetting is only possible
1962 Driver Electronic – PCB Drivers
26-01-2005 © by SEMIKRON