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STT6405_09 Datasheet, PDF (1/3 Pages) SeCoS Halbleitertechnologie GmbH – P-Channel Enhancement Mode Mos.FET
Elektronische Bauelemente
STT6405
-5.0 A, -30 V, RDS(ON) 50 mΩ
P-Channel Enhancement Mode Mos.FET
RoHS Compliant Product
A suffix of “-C” specifies halogen and lead-free
DESCRIPTION
The STT6405 uses advanced trench technology
to provide excellent on-resistance with low gate change.
The device is suitable for use as a load switch or in PWM applications.
FEATURES
P-Channel
Lower Gate Charge
Small Footprint & Low Profile Package
TSOP-6
A
E
L
B
F
C
H
DG
K
J
MARKING CODE
D6 D5 S4
6405
= Date Code
D1 D2 G 3
3
Gate
Drain
1256
78
4
Source
REF.
A
B
C
D
E
F
Millimeter
Min. Max.
2.70 3.10
2.60 3.00
1.40 1.80
1.10 MAX.
1.90 REF.
0.30 0.50
REF.
G
H
J
K
L
Millimeter
Min. Max.
0 0.10
0.60 REF.
0.12 REF.
0° 10°
0.95 REF.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
UNIT
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current 3
Pulsed Drain Current 1
Power Dissipation
Linear Derating Factor
Operating Junction and Storage Temperature Range
Thermal Resistance- Junction to Ambient3 Max.
VDS
VGS
ID @TA=25℃
ID @TA=70℃
IDM
PD @TA=25℃
Tj, Tstg
RθJA
-30
±20
-5.0
-4.2
-20
2
0.016
-55 ~ +150
62.5
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
V
V
A
A
W
W/ ℃
℃
℃/ W
PARAMETER
SYMBOL MIN TYP MAX UNIT
TEST CONDITIONS
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Forward Transconductance
Gate-Source Leakage Current
Drain-Source Leakage Current (Tj=25℃)
Drain-Source Leakage Current (Tj=55℃)
Static Drain-Source On-Resistance2
Total Gate Charge2
Gate-Source Charge
Gate-Drain (“Miller”) Charge
Turn-on Delay Time2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
BVDSS
VGS(th)
gfs
IGSS
IDSS
RDS(ON)
Qg
Qgs
Qgd
Td(on)
Tr
Td(off)
Tf
Ciss
Coss
Crss
Rg
-30 -
-
-1.0 - -3.0
- 8.6 -
-
- ±100
-
- -1
-
- -5
-
- 50
75
- 14.7 18
-
2
-
- 3.8 -
- 8.3 -
-
5
-
- 29 -
- 14 -
- 700 840
- 120 -
- 75 -
- 10 -
V VGS = 0, ID= -250 µA
V VDS = VGS, ID= -250µA
S VDS = -5V, ID = -5.0A
nA VGS = ±20 V
µA
VDS = -30 V, VGS = 0
VDS = -24 V, VGS = 0
mΩ
VGS = -10 V, ID = -5.0 A
VGS = -4.5 V, ID = -4.0 A
ID = -5.0 A
nC VDS = -15 V
VGS = -10 V
VDS = -15 V
ns
VGS = -10 V
RG = 3Ω
RL = 3Ω
VGS = 0 V
pF VDS = -15 V
f = 1.0 MHz
Ω f=1.0 MHz
Forward On Voltage2
Reverse Recovery Time2
Reverse Recovery Charge
SOURCE-DRAIN DIODE
VSD
-
- -1.0
Trr
- 23.5 -
Qrr
- 13.4 -
V IS = -1.0 A, VGS= 0 V
ns IS = -5.0A, VGS=0V,
nC dl/dt= 100A/µs
Notes:
1. Pulse width limited by Max. junction temperature.
2. Pulse width≦300µs, duty cycle≦2%.
3. Surface mounted on 1 in2 copper pad of FR4 board; 156℃/W when mounted on Min. copper pad.
28-Oct-2009 Rev. B
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