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LC87F5864B Datasheet, PDF (9/23 Pages) Sanyo Semicon Device – FROM 64K byte, RAM 2048 byte on-chip 8-bit 1-chip Microcontroller
Pin Description
Pin Name
I/O
VSS1, VSS2
-
VSS3
VDD1, VDD2
-
VDD3
Port 0
I/O
P00 to P07
Port 1
I/O
P10 to P17
Port 2
I/O
P20 to P27
LC87F5864B
- Power supply pin
Description
+ Power supply pin
• 8-bit I/O port
• I/O specifiable in 4-bit units
• Pull-up resistor can be turned on and off in 4-bit units
• HOLD release input
• Port 0 interrupt input
• Shared Pins
P05 : System clock output (system clock / can selected from sub clock)
P06 : Timer 6 toggle output
P07 : Timer 7 toggle output
• 8-bit I/O port
• I/O specifiable in 1-bit units
• Pull-up resistor can be turned on and off in 1-bit units
• Shared pins
P10 : SIO0 data output
P11 : SIO0 data input/bus I/O
P12 : SIO0 clock I/O
P13 : SIO1 data output
P14 : SIO1 data input/bus I/O
P15 : SIO1 clock I/O
P16 : Timer 1 PWML output
P17 : Timer 1 PWMH output/beeper output
• 8-bit I/O port
• I/O specifiable in 1-bit units
• Pull-up resistors can be turned on and off in 1-bit units
• Shared pins
P20 : UART transmit
P21 : UART receive
P20 to P23 : INT4 input/HOLD reset input/timer 1 event input/timer 0L capture input
/timer 0H capture input
P24 to P27 : INT5 input/HOLD reset input/timer 1 event input/timer 0L capture input
/timer 0H capture input
• Interrupt acknowledge type
Rising
Falling
Rising/
Falling
H level
L level
INT4
enable
enable
enable
disable
disable
INT5
enable
enable
enable
disable
disable
Option
No
No
Yes
Yes
Yes
Port 7
P70 to P73
I/O
• 4-bit I/O port
No
• I/O specifiable in 1-bit units
• Pull-up resistor can be turned on and off in 1-bit units
• Shared pins
AD converter input port : AN8 (P70), AN9 (P71)
P70 : INT0 input/HOLD reset input/timer 0L capture input/watchdog timer output
P71 : INT1 input/HOLD reset input/timer 0H capture input
P72 : INT2 input/HOLD reset input/timer 0 event input/timer 0L capture input /
high speed clock counter input
P73 : INT3 input (with noise filter)/timer 0 event input/timer 0H capture input
• Interrupt acknowledge type
Rising
Falling
Rising/
Falling
H level
L level
INT0
enable
enable
disable
enable
enable
INT1
enable
enable
disable
enable
enable
INT2
enable
enable
enable
disable
disable
INT3
enable
enable
enable
disable
disable
Continued on next page.
No.8296-9/23