LB11873 Datasheet, PDF (9/14 Pages) Sanyo Semicon Device – Monolithic Digital IC For Polygonal Mirror Motors Three-Phase Brushless Motor Driver

LB11873
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Pin No.
Pin
Description
18
CSD
Initial reset pulse generation and protection circuit
reference oscillator
Connect a capacitor between this pin and ground.
VREG
Equivalent Circuit
300Ω
18
19
FGS
FG Schmitt trigger output
VREG
19
20
LD
Phase lock detection output
This output goes to the on state (low-level output)
VREG
in the phase locked state.
20
21
S/S
Start/stop control
Low : 0V to 1.0V
High : 2.0V to VREG
Hysteresis : about 0.25V
This pin goes to the high level when open.
A low level specifies the start state.
VREG
22
CLK
Clock input
Low : 0V to 1.0V
High : 2.0V to VREG
Hysteresis : about 0.25V
fCLK = 10kHz max.
If there is noise on this signal, insert a noise
rejection capacitor at this input.
VREG
20kΩ
5kΩ
21
30kΩ
20kΩ
5kΩ
22
30kΩ
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