LC74736PT_11 Datasheet, PDF (81/106 Pages) Sanyo Semicon Device – On-Screen Display Controller

LC74736PT
72 COMMAND6A (PLL control 5 setting command)
(1) First byte
DA0 to 7
Register
State
Content
Function
7
-
1
Command 6 identification code
6
-
1
PLL control 5
5
-
1
4
-
0
3
-
1
Extended command A identification code
2
-
0
1
-
1
0
-
0
Notes
(2) Second byte
DA0 to 7
Register
State
Content
Function
7
-
0
6
HD
0
HD (AFC)
SEL
1
HIN (input)
5
DZ1
0
DZ1 DZ0
1
0 0 DZA 0.0ns
4
DZ0
0
0 1 DZB 0.5ns
1 0 DZC 2.5ns
1
3
HREF
0
HREF (sync)
SL
1
HREF (directly)
2
DID
0
DID2 1 0
Frequency division ratio (N1)
2
1
00 0
1/1
1
DID
0
00 1
1/2
1
01 0
1/3
1
01 1
1/4
0
DID
0
10 0
1/6
0
1
FDOT = FVCO×N1
Dot clock VCO oscillation frequency
*: This resistor is set to the all bits zero state when the IC is reset by the RST pin.
Notes
H sync signal switch at AFC
Enabled when Com67-2 CKSL is set to 10.
Dead zone specification
HREF selection
Dot clock frequency division ratio
specification
No.A0569-81/106