LA72710V Datasheet, PDF (8/10 Pages) Sanyo Semicon Device – Multi Channel Television Sound Decoder

LA72710V
I²C Timing Specifications
Parameter
LOW level input voltage
HIGH level input voltage
LOW level output current
SCL clock frequency
Set-up time for a repeated START condition
Hold time START condition. After this period, the first clock pulse is generated
LOW period of the SCL clock
Rise time of both SDA and SDL signals
HIGH period of the SCL clock
Fall time of both SDA and SDL signals
Data hold time
Data set-up time
Set-up time for STOP condition
BUS free time between a STOP and START condition
Symbol
VIL
VIH
IOL
fSCL
tSU:STA
tHD:STA
tLOW
tR
tHIGH
tF
tHD:DAT
tSU:DAT
tSU:STO
tBUF
min
-0.5
3.0
0
4.7
4.0
4.7
0
4.0
0
0
250
4.0
4.7
max
unit
1.5
V
5.5
V
3.0 mA
100 kHz
µs
µs
µs
1.0 µs
µs
1.0 µs
µs
ns
µs
µs
I²C Control Conditions
Grp-1
D8
D7
D6
D5
D4
D3
D2
D1
0
0
*
0
1
1
0
1
1
*
0
1
*
0
1
*
0
1
*
0
1
*
0
1
*
0
1
*:Initial condition
Read out data
D8
D7
D6
D5
D4
D3
D2
D1
0
0
0
0
0
0
0
1
0
1
(SLAVE ADDRESS 80H)
Condition
Bilingual
Main
Sub
(Prohibit)
Normal
Forced MONO
Normal (MUTE Off)
MUTE
ALC Off (Through)
ALC On
JUST CLOCK Off
JUST CLOCK On
SIF Mode
BASE BAND Mode
Fix
Prohibit (TEST Mode)
Condition
Fixed
Normal
Bilingual det
Normal
Stereo det
No.A0237-8/10