LV23015T Datasheet, PDF (7/17 Pages) Sanyo Semicon Device – Bi-CMOS IC For Mini Component, receiver 1-chip Tuner IC Incorporating PLL

LV23015T
Continued from preceding page.
No.
Control block data
(14)
Forced monaural
control data
STSW
(15)
SD sensitivity
(16)
adjustment data
SDC0
SDC1
Description
• Data to determine the output of the output port STSW, controlling the forced monaural stereo
function
“Data” = 0 : MONO
1 : STEREO
• Data to determine the output of output ports SDC0 and SDC1, setting the SD sensitivity
“Data” = SDC0 : 0, SDC1 : 0 → SD sensitivity = 50dBμV (Typ)
SDC0 : 0, SDC1 : 1 → SD sensitivity = 53dBμV (Typ)
SDC0 : 1, SDC1 : 0 → SD sensitivity = 59dBμV (Typ)
SDC0 : 1, SDC1 : 1 → SD sensitivity = 64dBμV (Typ)
Related data
Composition of the DO control data (serial data output)
(1) OUT mode
Address
DI 0 1 0 1 0 1 0 0
DO
Description of DO output data
No.
Control/data
Description
(1)
Stereo indicator
• Data latching stereo indicator and SI indicator states.
SD indicator
Latch made at a time of the data output mode (OUT mode).
Control data
STIND←Stereo indicator state
0 : ST ON, 1 : ST OFF
SDIND←SD indicator state
0 : SD ON, 1 : SD OFF
STIND, SDIND
(2)
PLL unlock data
• Data latching the content of the unlock detection circuit
UL←0 : At unlock
UL
1 : At lock or detection stop mode
(3)
IF counter
• Data latching the content of IF counter (20 bit binary counter)
Binary counter
C19←MSB of binary counter
C0 ←LSB of binary counter
C19 to C0
Related data
UL0
UL1
CTE
GT0
GT1
No.A1352-7/17