LC7930N Datasheet, PDF (5/7 Pages) Sanyo Semicon Device – LCD Drivers

LC7930N, 7930NW
Pin Descriptions
Pin Name
V_DD
V_SS
V_EE
Y1 to Y20
Y21 to Y40
V1, V2
V3, V4
V5, V6
L/R1
Function
Logic circuitry power supply (+5 V ±10%)
0V
LCD driver power supply (–4 to –6 V)
Channel 1 LCD driver output pins
Channel 2 LCD driver output pins
Reference voltage for selected driver outputs
Reference voltage for non-selected driver outputs (channel 1)
Reference voltage for non-selected driver outputs (channel 2)
Shift direction for channel 1 shift register
L/R1
High-level
Low-level
LDATA1
Output
Input
RDATA1
Input
Output
L/R2
Shift direction for channel 2 shift register
L/R2
High-level
Low-level
LDATA2
Output
Input
RDATA2
Input
Output
LDATA1
RDATA1
LDATA2
RDATA2
M
CLK_LA
CLK_SR
CH2-BP
Serial data input/output pins for channel 1 shift register
Serial data input/output pins for channel 2 shift register
Switching clock signal for LCD driver.
Latches channael 1 data on the falling edge.
This also will latch channel 2 data on the falling edge if CH2-BP is low.
Shift channel 1 data on the falling edge.
This also will shift channel 2 data on the falling edge if CH2-BP is low.
Switches the mode of channel 2.
Exchanges the latch signal for the shift signal of channel 2 and invert the M signal.
Channel 2, then, can be used as a scan-line driver.
CH2-BP
High
Low
Channel 2
Latch
Shift
CLK_SR
CLK_LA
CLK_LA
CLK_SR
M
M For scan-line driver
M For signal line driver
Functional Description
LC7930N, LC7930NW are serial data transfer type LCD drivers.
Data inputted serially from the data pin is shifted successively by the synchronizing clock (CLK_SR) and latched by the latch clock
(CLK_LA) when the all data are shifted.
. _{Segment terminal}
When CH2-BP goes to low, the data of channel 1 and channel 2 are shifted at the falling edge of CLK_SR, and then latched at
. the falling edge of the CLKLA. The reference pulse will be switched to selected or unselected due to the latched data.
Scan terminal
When CH2-BP goes to high, the data of channel 2 is shifted at the rising edge of CLK_LA, and then latched at the rising edge of
the CLK_SR. When FLM signal, as a data, is inputted, the output will be scan terminal drive mode.
Continued on next page.
No.2778-5/7