LA9703W_06 Datasheet, PDF (5/16 Pages) Sanyo Semicon Device – Front End Processor for DVD Player

LA9703W
Operational Descriptions
(1) Customer amplifier
This IC includes a built-in high-band operational amplifier. Pin 1 is the noninverting input and pin 64 is the inverting
input. Pin 62 is the output.
If this circuit is not used, short pins 62 and 64, and connect pin 1 to pin 58.
(2) RF amplifier
The RF signal input differentially to pins 59 and 61 is passed through a VCA used for AGC and an equalizer and output
as a differential signal from pins 54 and 55. The peak level and DC level of the differential signal output from pins 54
and 55 are detected. The AGC VCA is controlled by the detected peak signal to form an AGC loop. The time constant
used for peak detection can be set with the value of the capacitor connected to pin 50. The AGC circuit can be set to a
fixed gain by setting pin 23 to the high level. Also note that a DC servo is formed by adding the detected DC value to
the AGC VCA front end. The DC servo band can be set with the value of the capacitor connected to pin 52.
Setting pin 25 to the high level increases the gain of the input stage amplifier for pins 59 and 61 by a factor of five.
(3) RF equalizer
The equalizer is switched by pin 26 between DVD mode (when pin 26 is high) and CD mode (when pin 26 is low). The
equalizer band is set by the value of the resistor connected between pin 57 and ground. The equalizer fO frequency can
be changed by changing the pin 34 DC voltage.
The amount of boost provided by the equalizer can be changed by changing the pin 33 DC voltage.
(4) Peak hold/bottom hold
The peak hold and bottom hold envelope waveforms for the differential signal output from pins 54 and 55 is output
from pins 47 and 46. When pin 24 is at the high level, the peak envelope detection time constant can be set with the
value of the resistor connected between pin 49 and ground. The bottom hold band can be roughly doubled by setting pin
31 to the low level.
(5) Reflection amplifier
The current signal input to pins 9 and 10 is converted to a voltage and summed using a summation amplifier. The pit
component is removed from the input signal with a low-pass filter. The summed signal is passed through the VCA that
adjusts the servo gain and is output from pin 38. The VCA that adjusts the servo gain is controlled by the DC voltage
applied to pin 32.
The gain is increased by another factor of 5 when pin 25 is at the high level.
(6) FE amplifier
The current signal input to pins 9 and 10 is converted to a voltage and after passing through a balance adjustment VCA,
the difference is taken. That signal is then passed through a servo gain adjustment VCA and output from pin 39. The
gain of the balance adjustment VCA can be adjusted by changing the DC voltage applied to pin 32.
The gain is increased by another factor of 5 when pin 25 is at the high level.
(7) TE amplifier (for 3-beam systems)
The current signal input to pins 13 and 14 is converted to a voltage and after passing through a balance adjustment VCA,
the difference is taken. That signal is then passed through a servo gain adjustment VCA and, after band switching,
output from pin 40. The gain of the balance adjustment VCA can be adjusted by changing the DC voltage applied to pin
36. This VCA, which adjusts the servo gain, is controlled by the DC voltage applied to pin 32. The band switching
circuit consists of a low-pass filter whose frequency is 30kHz when pin 31 is at the high level and whose frequency is
200kHz when pin 31 is low. Also, when pin 30 is at the low level, the output is shunted to SREF.
The gain is increased by another factor of 5 when pin 25 is at the high level.
No.7413-5/16