LC75812PT Datasheet, PDF (46/54 Pages) Sanyo Semicon Device – 1/8, 1/9 Duty Dot Matrix LCD Display Controllers/Drivers with Key Input Function

LC75812PT
*36) Given below are the data formats of the "DCRAM data write" instructions (No. 3 to No. 21) for the sample
correspondence between the instructions and the display executed in the super increment mode. In the super
increment mode processing example shown below, 19 characters of DCRAM data is divided and written into
DCRAM in two operations.
LSB
No.
D0 to
D3
3 to 15
0
16 to 21
D4 to
D7
2
D8 to
D11
3
Instruction (HEX)
D12 to
D15
5
D16 to
D19
D20 to
D23
D24 to
D27
D28 to
D31
DCRAM data write (Super increment mode)
1
4
E
4
DCRAM data write (Super increment mode)
D32 to
D35
9
D36 to
D39
5
D40 to
D43
F
MSB
D44 to
D47
4
No.
3 to 15
16 to 21
LSB
D48 to
D51
0
D52 to
D55
2
D56 to
D59
C
7
Instruction (HEX)
D60 to
D63
4
3
D64 to
D67
D68 to
D71
D72 to
D75
D76 to
D79
DCRAM data write (Super increment mode)
3
5
9
4
DCRAM data write (Super increment mode)
5
3
8
3
D80 to
D83
0
1
D84 to
D87
2
3
D88 to
D91
C
2
MSB
D92 to
D95
4
3
LSB
No.
D96 to
D99
3 to 15
3
16 to 21
0
Instruction (HEX)
D100 to
D103
4
2
D104 to
D107
D108 to
D111
DCRAM data write
(Super increment mode)
0
0
DCRAM data write
(Super increment mode)
D
0
D112 to
D115
2
2
MSB
D116 to
D119
A
Operation
Display data “ ” “S” “A” “N” “Y” “O” “ ” “L” “S” “I” “ ” “L” “C”
are written sequentially to DCRAM addresses 00H to
0CH.
Display data “7” “5” “8” “1” “2” “ ” are written sequentially
to DCRAM addresses 0DH to 12H.
A
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