VP553 Datasheet, PDF (4/5 Pages) Sanyo Semicon Device – CRT Display Video Output Amplifier

VP553
Sample Thermal Design for the VP553
Conditions: For an f_H = 90 kHz class monitor, f_V = 100 MHz (clock).
V_CC = 80 V, V_OUT = 40 Vp-p (C_L = 10 pF)
Here we consider the case where such a monitor is to be operated at ambient temperatures up to Ta = 60°C and at a
maximum frequency of f = 100 MHz (clock).
As mentioned previously, the chips with the maximum loss will be transistors 3 and 4 in the emitter-follower stage.
Equation (5) follows from deriving that value from the figure below and equation (3).
P_C (Tr3, 4)_{f = 100 MHz} = 6.2 × 0.25 ≈ 1.55 [W] ......................................................(5)
However, the actual usage conditions include a blanking period. If we calculate the power during this period
approximately at a 1-MHz power ratio, from Pd – f (clock) and P_C (Tri)Ratio – f (clock) figures, we see that P_C (BLK)
for transistors 3 and 4 will be:
P_C BLK (Tr3, 4) = 2.2 × 0.08 = 0.18 [W]..............................................................(6)
If the blanking period is 20% of the total, from the data of equation (5) and formula (6) we see that the loss in transistors
3 and 4 will be:
P_C (Tr3, 4) = P_C (Tr3, 4) _{f = 100 MHz} × 0.8 + P_CBLK (Tr3, 4) × 0.2 ≈ 1.28 [W] ...(7)
Next, applying the value of θj–c to equation (7), shows ∆Tj to be:
∆Tj = 1.28 × 35 ≈ 45 [°C]
Since ∆Tj ≤ 50°C, it suffices to only consider the Tc ≤ 100°C condition in the thermal design. That is, in the thermal
design we design θh so that Tc will be under 100°C when Pd (total) = Pd (1ch) × 3 for the time when all three channels
are operating at their maximum levels.
∆Tc will be: ∆Tc = 100 – 60 = 40°C
θh = ∆Tc ÷ Pd (total) = 40 ÷ {(6.2 × 0.8 + 2.2 × 0.2) × 3} = 2.5
Thus:
θh = 2.5°C/W
In actual use, due to the actual ambient temperature, the operating conditions, and other factors, it will be possible to use
a heat sink smaller than the one required by the above design. Users should design an optimal heat sink using the data
presented above and their actual conditions.
V_CC (V)
80
V_OUT (V)
40
V_O (center)
40
No. 5350-4/5