LV2210V Datasheet, PDF (4/15 Pages) Sanyo Semicon Device – Basic Data Communication Receiver IC

LV2210V
PLL Divisor Setup Example
• The reference divider divisor is calculated as follows when a 12.8 MHz crystal element is used, the comparison
frequency in the phase detector is 5 kHz, and the VCO oscillator frequency is 26.545 MHz.
12.8 MHz ÷ 5 kHz = 2560 (divisor value)
Since there is a fixed divide-by-two circuit, the required divisor is as follows.
2560 × 1/2 = 1280
The value 1280 converted to binary (10100000000) is the reference divider setting data.
The programmable divider divisor is calculated as follows.
26.545 MHz ÷ 5 kHz = 5309 (divisor value)
The value 5309 converted to binary (1010010111101) is the programmable divider setting data.
• The control data is set as follows
CONTROL DATA
AD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9 D10 D11 D12 D13 D14 D15 AD
0
0
0
0
0
0
0
0
1
0
1
0
0
1
0
0
0
1
0
1
1
1
1
0
1
0
0
1
0
1
0
0
0
1
(Charge pump current = 100 µA, Data shaper switch = on)
Low-Pass Filter and Data Shaper Application Examples
Example 1 (Switch: 0)
Example 2 (Switch: 1)
LPF
9
10
11
LPF
9
10
11
ILV00150
ILV00151
No. 7028-4/15