LC8740C8A Datasheet, PDF (4/25 Pages) Sanyo Semicon Device – 8-bit 1-chip Microcontroller

LC8740C8A/B2A/96A
„Interrupts
• 21 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
Vector Address
Level
Interrupt Source
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2/T0L
4
0001BH
H or L
INT3/base timer
5
00023H
H or L
T0H
6
0002BH
H or L
T1L/T1H
7
00033H
H or L
SIO0/UART1 receive
8
0003BH
H or L
SIO1/UART1 transmit/data slicer/SIO6
9
00043H
H or L
ADC/vertical sync (VS)/scan line
10
0004BH
H or L
Port 0/T4/T5
• Priority levels X > H > L
• Of interrupts of the same level, the one with the smallest vector address takes precedence.
„Subroutine Stack Levels: 1024 levels maximum (the stack is allocated in RAM.)
„Oscillation Circuits
• RC oscillation circuit (internal): For system clock
• VCO oscillation circuit (internal): For system clock generation and CRT display
• Crystal oscillation circuit:
For low-speed system clock, base timer, and PLL reference
„System Clock Divider Function
• Can run on low current.
• The minimum instruction cycle selectable from 212ns, 424ns, 848ns, 1.7µs, 3.4µs, 6.8µs, 13.6µs, 27.1µs, and
54.3µs (at a main clock rate of 14.1MHz).
„Standby Function
• HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) Canceled by a system reset or occurrence of an interrupt
• HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The VCO, RC, and crystal oscillators automatically stop operation.
2) There are three ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level.
(2) Setting at least one of the INT0, INT1, and INT2 pins to the specified level
(3) Having an interrupt source established at port 0
„ROM Correction Function
• Executes the correction program on detection of a match with the program counter value.
• Correction program area size: 256 bytes (4 vector addresses)
„Package Form
• QIP64E(14×14):
• DIP64S(600mil):
Lead-free type
Lead-free type
„Development Tools
• Flash ROM ^version:
LC87F40C8A (Onchip debugger function is included.)
• Onchip debugger interface board: TCB87 (Type B)
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