LV3327PV Datasheet, PDF (3/11 Pages) Sanyo Semicon Device – Electronic Volume IC

Pin Assignment
LV3327PV/PGP
LCT 1
LSELO 2
IN1 3
IN2 4
IN3 5
IN4 6
RSELO 7
RCT 8
LV3327PV
TOP VIEW
16 LOUT
15 TEST
14 VDD
13 DATA
12 CLK
11 VSS
10 VREF
9 ROUT
12 11 10 9
TEST 13
LOUT 14
LCT 15
LSELO 16
LV3327PGP
1234
8 VREF
7 ROUT
6 RCT
5 RSELO
TOP VIEW
Block Diagram
LCT
LSELO
IN1
IN2
IN3
IN4
RSELO
RCT
INMUTE
Lch MAIN
VOLUME
+10 -79.5dB,-
(0.5dB_step)
LVREF
BIAS
VOLTAGE
CIRCUIT
RVREF
INMUTE
Rch MAIN
VOLUME
+10 -79.5dB,-
(0.5dB_step)
Lch
OUTPUT GAIN
LOUT
PA
0dB,+6dB
MUTE
LOGIC
I²C
INTERFACE
LOGIC
TEST
VDD
DATA
CLK
VSS
VREF
MUTE
Rch
OUTPUT GAIN
ROUT
PA
0dB,+6dB
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