LC865632 Datasheet, PDF (3/20 Pages) Sanyo Semicon Device – 8-Bit Single Chip Microcontroller

LC865632/28/24/20/16/12/08A
(11) Interrupts system
- 13-sources 10-vectored interrupts :
1. External interrupt INT0 (include watchdog timer)
2. External interrupt INT1
3. External interrupt INT2, timer / counter T0L (Lower 8 bits)
4. External interrupt INT3, base timer
5. Timer / counter T0H (Upper 8-bit)
6. Timer T1L, Timer T1H
7. Serial interface SIO0
8. Serial interface SIO1
9. AD converter
10. Port 0
- Built-in interrupt priority control register
Microcontroller allows 3 levels of interrupt; low level, high level, and highest level of multiplex interrupt. It can specify
a low level or a high level interrupt priority from INT2/T0L through port 0 (i.e. the above interrupt number from three
through ten). It can also specify a low level or the highest level interrupt priority to INT0 and INT1.
(12) Real-time service operation
The Real-Time Service (RTS) functions the 4-byte data-transfer between the Special Function Registers at acknowledging
the interrupt request.
The RTS starts within 1 instruction cycle-time and completes within 5 instructions cycle-time after occurring the interrupt
request.
(13) Sub-routine stack levels
- 128 levels (Max.) : stack area included in RAM area
(14) Multiplication and division
- 16 bits × 8-bit (7 instruction cycle times)
- 16 bits ÷ 8-bit (7 instruction cycle times)
(15) Three oscillation circuits
- On-chip RC oscillation circuit using for the system clock
- On-chip CR oscillation circuit using for the system clock
- On-chip crystal oscillation circuit using for the system clock and for time-base clock
XT1 terminal can be used as P74
(16) Standby function
- HALT mode function
The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is stopped. This
operation mode can be released by the interrupt request signals or the initial system reset request signal.
- HOLD mode function
The HOLD mode is used to freeze all the oscillations ;
RC (internal), CF and Crystal oscillations. This mode can be released by the following operations.
• Reset terminal ( RES ) set to low level
• P70/INT0, P71/INT1 terminals set to assigned level (programmable)
• Input a Port 0 interrupt condition
(17) Factory shipment
• DIP64S, QFP64E delivery form
(18) Development support tools
- Evaluation (EVA) chip
- EPROM version
- One time version
- Emulator
: LC866098
: LC86E5632
: LC86P5632
: EVA86000 + ECB866600 (Evaluation chip board)
+ POD865000 (Pod for DIP64S)
+ POD865010 (Pod for QFP64E)
No.6698-3/20