LC75835W Datasheet, PDF (3/35 Pages) Sanyo Semicon Device – CMOS IC 1/3, 1/4-Duty General-Purpose LCD Display Driver

LC75835W
Electrical Characteristics for the Allowable Operating Ranges
Parameter
Symbol
Pin
Conditions
Ratings
Unit
min
typ
max
Hysteresis
Input high-level current
VH
CE, CL, DI, INH
IIH1
CE, CL, DI, INH VI = 3.6V
IIH2
OSCI
VI = 3.6V
0.1VDD
V
1.0
µA
1.0
Input low-level current
IIL1
CE, CL, DI, INH VI = 0V
IIL2
OSCI
VI = 0V
-1.0
µA
-1.0
Output high-level voltage
Output low-level voltage
VOH1
VOH2
VOH3
VOL1
S1 to S35
COM1 to COM4
P1 to P16
S1 to S35
IO = -20µA
IO = -100µA
IO = -1mA
IO = 20µA
VLCD-0.9
VLCD-0.9
VLCD-0.9
V
0.9
VOL2 COM1 to COM4 IO = 100µA
0.9 V
VOL3 P1 to P16
IO = 1mA
0.9
Output middle-level
voltage *2
VMID1
COM1
to COM4
1/2 bias IO = ±100µA
1/2VLCD
-0.9
1/2VLCD
+0.9
VMID2 S1 to S35
1/3 bias IO = ±20µA
2/3VLCD
-0.9
2/3VLCD
+0.9
VMID3 S1 to S35
1/3 bias IO = ±20µA
1/3VLCD
-0.9
1/3VLCD
V
+0.9
VMID4
COM1
to COM4
1/3 bias IO = ±100µA
2/3VLCD
-0.9
2/3VLCD
+0.9
VMID5
COM1
to COM4
1/3 bias IO = ±100µA
1/3VLCD
-0.9
1/3VLCD
+0.9
LCD drive bias voltage
VLCD1 VLCD1
1/3 bias II = ±0µA
Current supply to bias voltage generation
divider resistors
Outputs open
2/3VLCD
-0.03VLCD
2/3VLCD
2/3VLCD
+0.03VLCD
VLCD2 VLCD2
1/3 bias II = ±0µA
Current supply to bias voltage generation 1/3VLCD
divider resistors
-0.03VLCD
1/3VLCD
1/3VLCD
+0.03VLCD
V
Outputs open
VLCD12 VLCD1,
VLCD2
1/2 bias II = ±0µA
Current supply to bias voltage generation
divider resistors
Outputs open
1/2VLCD
-0.03VLCD
1/2VLCD
1/2VLCD
+0.03VLCD
Oscillator frequency
fosc Internal
Internal oscillator operating mode
oscillator circuit
236
295
354 kHz
Current drain
IDD1 VDD
Power-saving mode
1
IDD2 VDD
VDD = 3.3V normal mode
External clock operating mode *3
5
10
IDD3 VDD
VDD = 3.3V normal mode
External clock operating mode *3
90
180
Serial data transfer *4
IDD4 VDD
VDD = 3.3V normal mode
Internal oscillator operating mode
50
100
IDD5 VDD
VDD = 3.3V normal mode
Internal oscillator operating mode
135
270 µA
Serial data transfer *4
ILCD1 VLCD
Power-saving mode
1
ILCD2 VLCD
VLCD = 5.0V output open
Normal mode, 1/2 bias
85
170
ILCD3 VLCD
VLCD = 5.0V output open
Normal mode, 1/3 bias
55
110
ILCD4 VLCD
VLCD = 5.0V output open
Normal mode, current to bias voltage
10
20
generation divider resistors shut off
Note: *2 Excluding the bias voltage generation divider resistors (RLCD = 30kΩ typ.) built in the VLCD1 and VLCD2.
(See Figure 1.)
Note: *3 External clock operating mode (fCK = 32.8kHz, VIH2 = VDD, VIL2 = 0V, rise/fall time = 20ns)
Note: *4 Serial data transfer (data transfer frequency 2MHz, VIH1 = VDD, VIL1 = 0V, rise/fall time = 20ns)
No.A0429-3/35