LA73076V Datasheet, PDF (3/7 Pages) Sanyo Semicon Device – Monolithic Linear IC Video Driver for DVC/DSC, Cell Phone

LA73076V
Pin Assignment, Pin Function Diagram and Block Diagram
Control
OUT
PIN2 PIN1 MIX Y C
L
L(GND) _{{ { {}
M(OPEN) × _{{ {}
H _{× ×
H(OPEN) ^*
×××
Active
(Input signal)
Signal → ON
No signal → OFF
Standby → OFF
(Note 1)
The wiring from MIX-OUT(13Pin),
Y_OUT(Pin15) to 75Ω must be as
shortened as possible.
VCC
S-CTL
1
P-SAV-CTL
2
TDK
C1608 JB 1C 104k
75Ω 0.1µF
3
PIN4 C(PIN3) ^VCC
C-OUT
L(OPEN) through
H MUTE
TDK
C1608 JB 1C 104k
from DAC
TDK
C1608 JB 1C 105k
4
C-MUTE-CTL
0.1µF
5
C-IN
1µF
6
RIP-FIL
1µF Y-IN
from DAC
7
(Note 3)
The wiring from C-OUT
(3Pin), C-IN(5Pin), Y-IN
(7Pin) to 75Ω must be as
shortened as possible.
TDK
C1608 JB 1C
105k
8
GND
(Note 5)
Use the input capacity value within a range of
0.1µF to 1µF while checking the sag
condition of the output waveform.
DR
DR
6dB
6dB
LPF
SW
MUTE
DC
LPF
CLAMP
REG
DR
6dB
Negative
Voltage
Generator
16
A-GND
15
Y-OUT ^75Ω
← 0V
14
VCC_A
75Ω
13
MIX-OUT
VCC_NVG
12
TDK
C1608 JB 1C 475k
11
-VCC 4.7µF
VCC
← 0V
(Note 2)
Position the decoupling
capacitor of VCC-GND
as near as possible to
this IC.
TDK
C1608 JB OJ 475k
10
ND
2.2µF
(Note 4)
TDK
For these two capacities;
9
C1608 JB 1C 225k Temperature
CLK-OUT
characteristic B rank
(±10%)
Electrostatic tolerance
K rank(±10%)
and Withstand voltage
of 6.3V or more are
recommended.
(Note 6)
As the minus power supply in this IC generates the clock for charge pump power supply by extracting the sink component
of the input video signal (synchronous isolation) and by detecting its fall, the portion around the V-syncrhonization of this IC
output may be reduced when the pseudo V signal without cut-in pulse is inserted as in the case of certain analog VCR
special play (search). On the contrary, there is no problem when the pseudo V signal has the cut-in pulse. Pay due attention
on this fact during use.
No.A0911-3/7