LC074146LP Datasheet, PDF (28/31 Pages) Sanyo Semicon Device – CMOS IC Monaural CODEC+Audio I/F +Video driver IC

VREF/line out start/stop sequence
BIAS circuit on
Power down
VREF_BIAS1
VREF_BIAS0
PDNB
LO_PDX
LO_VREFSW
LO_MUTE
BIAS
charge
LC074146LP
LINE MUTE
LINE output
BIAS circuit off
BIAS
discharge
Power down
LOUT1
t1
t2
t2
t1
1/2VDDA
• Recommended values
t1 = 300ms or more (when external capacitance connected to VREF is 1µF)
t2 = 1ms or more
Speaker Amplifier Startup Sequence
SPK
power down
SP_PDX
SP_OUT_EN
BIAS
started ^{SPK operation active}
BIAS mode
(standby)
SPK operation active
SPK
power down
BIAS
started
t1
t2
t2 ^{No time limit}
SPOUTP
SPOUTN
• Recommended values
t1 = 40ms or more (when external capacitance connected to SPKIN is 0.1µF)
t2 = 10ms or more
• SP_OUT_EN, SPK_PDX must be set to 0 when the SPK is placed in the power down mode.
1/2VDD
No.A0906-28/31