LA1781M_09 Datasheet, PDF (25/48 Pages) Sanyo Semicon Device – For Car Radios Single-Chip Tuner IC

LA1781M
• The LA1781M includes two AGC circuits in its front end block.
(1) Antenna input limiter using a pin diode.
(2) FET second gate control
The AGC input pin is pin 59, and the AGC circuit turns on when a signal of about 30mVrms is input.
AGC activation
The pin diode drive circuit turns on when VCC - V2 is greater than or equal to about 1V, and input limitation is
applied to the antenna circuit. In application circuits, there will be an attenuation of about 30 to 40dB. Next, when an
adequate current flows in the antenna attenuator pin diode, the inductance falls, the FET second gate voltage drops,
the FET gm falls, and the AGC operates. The recommended FET is the Sanyo 3SK263, which is an
enhancement-type MOSFET. Therefore, full AGC is applied when the voltage, VG2-S, between the second gate and
the source is 0. Note that if a depletion-type MOSFET is used, AGC will not be applied unless VG2-S is less than 0.
V2 AGC Characteristics Fig. 9
9
fr = 98.0Hz
8
VCC = 8V
Ta = 25°C
7
6
Range where AGC level AGC level due
5
the AGC does due to the to the MOSFET
not operate pin diode : second gate :
about 35dB about 35dB
4
3
2
1
0
--10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140
ANT IN -- dBμ
• Mixer
The mixer circuit in this IC is a double-balanced mixer with both
balanced input and balanced output.
Input circuit type
Emitter input
Input impedance : 25Ω
64 59
60 63 62
Due to optimized device geometry, emitter current, the bias, this IC
achieves the following performance.
MIX
Mixer input usable sensitivity : 15dBμ
Mixer input IMQS : 90.5dBμ
(For an oscillator level of 200mVrms)
OSC
* The mixer input IMQS is defined as :
fr = 98.8MHz, no input
fu1 = 98.8MHz, 1kHz, 30% modulation
fu2 = 99.6MHz, no modulation
The interference 1 and 2
input levels such that
generated intermodulation
output signal-to-noise ratio
becomes 30dB when an
interference signal with the
same level as the mixer input
is input, and distortion occurs
in the mixer.
Mixer circuit
Fig. 10
No.6038-25/48