LB11600JV_11 Datasheet, PDF (24/30 Pages) Sanyo Semicon Device – Brushless Motor Predriver IC for Automotive Applications

LB11600JV
<Reset time (Trest f) due to the PWMRE pin (CTL+ buffer input mode) when VCC = 5V>
1. CTL+ input mode (When the TOC potential is higher than the PWM triangle wave rise)
The rise potential (V1) and fall potential (V2) due to the on/off duty due to the TOC potential and the PWM triangle wave
When on: V1 = (V0 - Ipwmre × R) × e-t1/RC + Ipwmre × R
When off: V2 = V1 × e-t2/RC
When the TOC potential rises and the PWM triangle wave rise is slow, the IC will be in the ON duty state at startup.
This results in the time Tpwmra, which is the time until the PWM triangle wave low level is reached.
The potential difference due to each input pulse is: ΔV = V2 - Vpwmra.
Vpwmra = (Ipwm × Tpwmra) / Cpwm
Ipwm:
PWM pin charge current: 45µA (typical)
Cpwm:
Capacitance of the PWM pin external capacitor
Ipwmre: PWMRE pin charge current: 200µA (typical)
V0:
PWMRE pin initial potential: 0 V
C:
Capacitance of the PWMRE pin external capacitor
R:
Resistance of the PWMRE pin external resistor
t1:
PWMIN pin input duty on time
t2:
PWMIN pin input duty off time
The time (n times the PWMIN period) required for the potential, which is increased by the V2 potential difference (ΩV)
on each input pulse, to exceed the threshold voltage (Vth = 1.25V) is the reset period (Trest).
V2 + ΔV + ΔV⋅⋅⋅ ≥ 1.25V
Trest ≤ TPWMIN × n + Tpwmra (s)
2. CTL+ input mode (When the TOC potential rises after the PWM triangle wave rises)
The time required for the sum of the potentials due to the times set for each on/off duty ratio for the rise time to exceed the
threshold voltage (1.25V) becomes the reset time (Trest).
The times t1 and t2 for the rise potential (V1) and fall potential (V2) due to each on duty ratio will differ. Thus these must
be calculated individually for each input pulse signal. The formulas for calculating V1 and V2 are the same as for the
PWMIN input case.
No.8321-24/30