LC786961W Datasheet, PDF (23/29 Pages) Sanyo Semicon Device – Compact Disc Player IC

SDRAM Refresh Timing (Auto Refresh)
SDCSB
SDCLK
TS14
TS5
TS6
1/FS1
TS7
SDCKE
SDRASB
TS5
TS6
TS7
SDCASB
SDWEB
DADD[13:0]
SDDQMU
SDDQML
DDAT[15:0]
LC786961W
TS15
Symbol
Parameter
min
typ
max unit
FS1
SDRAM clock (SDCLK) frequency
16.9344
MHz
TS2
Row (SDRASB) cycle time
(1/FS1)×5
ns
TS3
Row (SDRASB) active time
(1/FS1)×3
ns
TS4
RASB-CASB delay time (SDRASB-SDCASB)
(1/FS1)×2
ns
TS5
Command "L" level width
(SDCSB, SDCKE, SDRASB, SDCASB, SDWEB)
TS6
Command setup time
(SDCSB, SDCKE, SDRASB, SDCASB, SDWEB, SDDQMU, SDDQML)
TS7
Command hold time
(SDCSB, SDCKE, SDRASB, SDCASB, SDWEB, SDDQMU, SDDQML)
TS8
Address (DADD) setup time
40
ns
10
ns
10
ns
10
ns
TS9
Address (DADD) hold time
10
ns
TS10
SDRAM read data setup time (Data read from SDRAM)
20
ns
TS11
SDRAM read data hold time (Data read from SDRAM)
0
ns
TS12
TS13
TS14
SDRAM write data hold time before rising edge of SDCLK
(Data write to SDRAM)
SDRAM write data hold time after rising edge of SDCLK
(Data write to SDRAM)
Row (SDRASB) pre-charge time
10
ns
10
ns
(1/FS1)×3
ns
TS15
Row (SDRASB) active time after refresh
(1/FS1)×5
ns
Notes
• Setup time and Hold time specifications in above table are measured from the rising edge of SDCLK signal.
• All the specifications in above table are applied to Read mode, Write mode and Refresh mode.
No.A2081-23/29