LC87F14C8A Datasheet, PDF (22/26 Pages) Sanyo Semicon Device – CMOS IC FROM 128K byte, RAM 10K byte on-chip 8-bit 1-chip Microcontroller with USB-host controller

LC87F14C8A
Characteristics of a Sample Main System Clock Oscillation Circuit
Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a
SANYO-designated oscillation characteristics evaluation board and external components with circuit constant values
with which the oscillator vendor confirmed normal and stable oscillation.
Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Oscillator
Nominal
Frequency
Vendor
Name
Oscillator Name
Circuit Constant
C1
C2
Rd1
[pF]
[pF]
[Ω]
Operating
Voltage
Range
[V]
Oscillation
Stabilization Time
typ
max
[ms]
[ms]
Remarks
6MHz
MURATA
CSTCR6M00G15***-R0 (39)
(39)
1k
2.7 to 5.5
0.10
0.50
8MHz
MURATA CSTCE8M00G15***-R0 (33)
(33)
470
3.0 to 5.5
0.10
10MHz
MURATA CSTCE10M0G15***-R0 (33)
(33)
330
3.0 to 5.5
0.10
0.50
Built in C1, C2
0.50
12MHz
MURATA CSTCE12M0G15***-R0 (33)
(33)
330
3.0 to 5.5
0.10
0.50
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after VDD
goes above the operating voltage lower limit (see Figure 4).
Characteristics of a Sample Subsystem Clock Oscillator Circuit
Given below are the characteristics of a sample subsystem clock oscillation circuit that are measured using a SANYO-
designated oscillation characteristics evaluation board and external components with circuit constant values with which
the oscillator vendor confirmed normal and stable oscillation.
Table 2 Characteristics of a Sample Subsystem Clock Oscillator Circuit with a CF Oscillator
Nominal
Frequency
Vendor
Name
Operating
Oscillation
Circuit Constant
Voltage
Stabilization Time
Oscillator Name
C3
C4
Rf
Rd2
Range
typ
max
Remarks
[pF]
[pF]
[Ω]
[Ω]
[V]
[s]
[s]
32.768kHz
EPSON
TOYOCOM
MC-306
18
18
OPEN 510k 2.7 to 5.5
1.1
Applicable
3.0
CL value = 12.5pF
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after the
instruction for starting the subclock oscillation circuit is executed and to the time interval that is required for the
oscillation to get stabilized after the HOLD mode is reset (see Figure 4).
Note: The components that are involved in oscillation should be placed as close to the IC and to one another as possible
because they are vulnerable to the influences of the circuit pattern.
CF1
CF2
Rd1
C1
CF
C2
Figure 1 CF Oscillator Circuit
XT1
Rf
XT2
Rd2
C3
X’tal
C4
Figure 2 XT Oscillator Circuit
0.5VDD
Figure 3 AC Timing Measurement Point
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