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STK611-721-E Datasheet, PDF (2/9 Pages) Sanyo Semicon Device – Fan 3-phase Inverter Motor Drive Inverter Hybrid IC
STK611-721-E
Specifications
Absolute Maximum Ratings at Tc = 25°C
Parameter
Symbol
Conditions
Supply voltage
VCC
+ to -, surge < 450V
*1
Collector-emitter voltage
VDS
+ to U (V, W) or U (V, W) to -
Output current
IO
+, -, U, V, W terminal current
Output peak current
Iop
+, -, U, V, W terminal current P.W. = 100μs
Pre-driver voltage
VD1, 2, 3, 4 VB1 to U, VB2 to V, VB3 to W, VDD to VSS
*2
Input signal voltage
VIN
HIN1, 2, 3, LIN1, 2, 3 terminal
FAULT/EN terminal voltage
VFAULT
FAULT/EN terminal
ITRIP terminal voltage
VITRIP
ITRIP terminal
Maximum power dissipation
Pd
MOSFET/1 channel
Junction temperature
Tj
MOSFET
Storage temperature
Tstg
Operating substrate temperature Tc
H-IC case temperature
Tightening torque
A screw part
*3
Reference voltage is “-” terminal = “VSS” terminal voltage unless otherwise specified.
Ratings
unit
450
V
600
V
±2
A
±4
A
20
V
0 to 15
V
20
V
5
V
16.6
W
150
°C
-40 to +125
°C
-20 to +100
°C
0.6 N•m
*1 Surge voltage developed by the switching operation due to the wiring inductance between “+” and “-” terminals.
*2 Terminal voltage : VD1=VB1 to U, VD2=VB2 to V, VD3=VB3 to W, VD4=VDD to VSS.
*3 Flatness of the heat-sink should be 0.15mm and below.
Electrical Characteristics at Tc=25°C, VD=15V
Parameter
Power output section
Drain-Source Leakage current
Drain-Source On Resistance
Diode forward voltage
Junction to case thermal resistance
Control (Pre-driver) section
Pre-driver power dissipation
Symbol
IDSS
RDS(ON)
VSD
θj-c(T)
ID
Input ON threshold voltage
Input OFF threshold voltage
FAULT/EN clearness delay time
Vinth(on)
Vinth(off)
FLTCLR
Protection section
Pre-drive power supply
low voltage protection voltage
Resistance for substrate temperature
monitors
Fault/EN terminal input current
ITRIP threshold voltage
UVLO
Rt
IOSD
VITRIP
Conditions
VDS = 600V
ID = 2A
ID = -2A
MOSFET
VD1, 2, 3 = 15V
VD4 = 15V
HIN1, HIN2, HIN3, LIN1, LIN2,
LIN3 to VSS
After each protection operation
ending
Resistance between TH and
VSS terminals
VFault = 0.15V
Test circuit
Fig.1
Fig.2
Fig.3
Fig.4
min
1.5
0.8
8
90
0.41
typ
0.05
1.4
2.1
1.3
8
100
2
0.465
max
unit
0.1
mA
4
Ω
1.5
V
7.5 °C/W
0.2
mA
4.0
2.5
V
1.5
V
ms
9.8
V
110
kΩ
mA
0.52
V
Switching time
tON
tOFF
IO = 2A
Inductive load
Fig.5
0.8
μs
1.5
Reference voltage is “-” terminal = “Vss” terminal voltage unless otherwise specified.
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