LV3400M Datasheet, PDF (2/4 Pages) Sanyo Semicon Device – FM Multiplex Filter

LV3400M
Operating Conditions at Ta = 25°C
Parameter
Operating supply voltage range
Input signal voltage range
Clock frequency
Clock input voltage
Symbol
V_CC
V_IN
f_CK
V_CK
Conditions
A composite signal corresponding to a 100%
FM modulation level
f_IN = 76 kHz, CW
Operating Characteristics at Ta = 25°C, V_CC = 5 V, f_CK = 3.6 MHz, V_CK = 1 Vp-p
Parameter
Current drain
SCF block common voltage
Signal input resistance
Clock input resistance
[MSK Output]
MSK input sensitivity
MSK output high level
MSK output low level
Symbol
Conditions
min
I_CCO
The pin 14 current for a no-signal input to V_IN
3.8
V₂
The pin 2 voltage for a no-signal input to V_IN
2.1
Rin3 The pin 3 input resistance
Rin12 The pin 12 input resistance
The input level such that an MSK output with the same
V_3S
frequency is acquired when a 76-kHz CW is applied
as V_IN.
V_10H
V_10L
V_IN = 76 kHz, 4 mVrms, CW
4
Reference Characteristics
Parameter
AAF cutoff frequency
HPF corner frequency
LPF cutoff frequency
BPF center frequency
BPF -3 dB frequency
Maximum in-band group delay time difference
Symbol
Conditions
Ratings
4.5 to 5.5
200 to 300
8 to 30
3.60
1.0 to V_CC
Unit
V
mVrms
mVrms
MHz
Vp-p
typ
max
Unit
6
8
mA
2.3
2.5
V
36
kΩ
100
kΩ
4
mVrms
V
0.4
V
Ratings
Unit
300
kHz
54
kHz
125
kHz
76
kHz
19
kHz
±5
µs
Pin Functions
PinNo.
1
2
3
10
11
12
13
14
4 to 9
Symbol
GND
VCOM
SIG. IN
MSK OUT
V_REF
CLK IN
CLK OUT
V_CC
NC, Test PIN
Description
Ground
SCF block common. A decoupling capacitor must be used.
Signal input. Input an FM modulated signal (composite signal). A modulated signal between 200 and 300 mVrms should be
input. The input sensitivity for a pure 76-kHz signal is 4 mVrms or lower.
MSK output (CMOS output)
Limiter reference voltage. A low-pass filter is formed by the internal resistance (which is about 10 kΩ) and an external capacitor.
3.6-MHz clock input. The DC bias at the CMOS inverter input, to which a 100-kΩ feedback resistor is connected, is about
V_CC/2. The clock signal is input through a capacitor.
The clock output that was wave-shaped by an inverter. This pin is normally left open.
Power supply
This pin must be left open.
Usage Notes
1. Pins 4 to 9 and pin 13 are left open in normal use.
2. The clock should be taken from the decoder (LC72700) clock output pin and input to pin through a capacitor of about
100 pF. Spurious radiation from the clock line can be reduced by inserting a resistor in the line and thus smoothing
the rising and falling edges. This signal is then input to pin 12 through a capacitor.
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