LA5318V Datasheet, PDF (2/4 Pages) Sanyo Semicon Device – Voltage-Dividing Voltage Generator for Multi-Voltage LCD Matrix Drive

LA5318V
Operating Characteristics at Ta = 25°C, V_CC –V_EE= –20 V, V_REF = V_EE, R_X = 8R, B_IN = OPEN
Parameter
Symbol
Conditions
Current drain
Output voltage ratio 1
Output voltage ratio 2
Output voltage ratio 3
Output voltage ratio 4
Output voltage ratio 5
Output voltage ratio 3
Internal resistance ratio 1
Internal resistance ratio 2
Internal resistance ratio 3
Internal resistance ratio 4
Resistance
Load regulation 1
Load regulation 2
Load regulation 3
Load regulation 4
Load regulation –1A
Load regulation –2A
Load regulation –3
Load regulation –4
Load regulation –1B
Load regulation –2B
OUTR pin saturation voltage
I_CC, I_EE
Ra1
Ra2
Rb1
Rb2
Rb3
Rb4
R_X1
R_X2
R_X3
R_X4
R
∆V1
∆V2
∆V3
∆V4
–∆V1A
–∆V2A
–∆V3
–∆V4
–∆V1B
–∆V2B
V_OUTR
V_CC – V_EE= –20 V, R_X = 8R, INR = V_CC : V_CC, V_EE
V2/V1
(V_REF – V3)/(V_REF – V4)
V_REF/V1
V_REF/V2
V_REF /(V_REF – V3)
V_REF /(V_REF – V4)
R_X1 – R_X2
R_X1 – R_X3 _{Referenced to the resistance}
R_X1 – R_X4 ^{R between R}X^{4 and V}IN³
R_X1 – V_IN3
The value of R when the voltage across
R_X4 and V_IN3 is 0.5 V.
+0.1 mA < I_OUT1 < +5 mA : V1
+0.1 mA < I_OUT2 < +5 mA : V2
+0.1 mA < I_OUT3 < +5 mA : V3
+0.1 mA < I_OUT4 < +5 mA : V4
–0.5 mA < I_OUT1 < –0.1 mA : V1
–0.5 mA < I_OUT2 < –0.1 mA : V2
–10 mA < I_OUT3 < –0.1 mA : V3
–10 mA < I_OUT4 < –0.1 mA : V4
–5 mA < I_OUT1 < –0.1 mA, B_IN = GND : V1
–5 mA < I_OUT2 < –0.1 mA, B_IN = GND : V2
I_OUT = 20 mA, V_CC – INR = 2.7 : OUTR – V_EE
Note: For I_OUT, minus (–) indicates source current and plus (+) indicates sink current.
min
1.96
1.96
11.64
5.82
5.82
11.64
Ratings
typ
0.35
2.00
2.00
12.00
6.00
6.00
12.00
8
12
14
15
30
Unit
max
0.5 mA
2.04
2.04
12.36
6.18
6.18
12.36
kΩ
±20 mV
±20 mV
±20 mV
±20 mV
±20 mV
±20 mV
±20 mV
±20 mV
±20 mV
±20 mV
0.5
V
Pin Assignment
Block Diagram
V1, V2 bias
control
VREF
control
(This circuit must be used with V_RX1 ≥ V_RX2 ≥ V_RX3 ≥ V_RX4.)
No. 5670-2/4