LC875932A Datasheet, PDF (17/23 Pages) Sanyo Semicon Device – CMOS IC Internal 32K/24K/16K-byte ROM and 1024-byte RAM 8-bit 1-chip Microcontroller

LC875932A/24A/16A
Pulse Input Conditions at Ta = -30°C to +70°C, VSS1 = VSS2 = VSS3 = 0V
Parameter
High/low level
Symbol
tPIH(1)
Pin/Remarks
INT0(P70),
Conditions
• Interrupt source flag can be set.
Specification
VDD [V]
min
typ
max
pulse width
tPIL(1)
INT1(P71),
• Event inputs for timer 0 or 1
INT2(P72),
are enabled.
2.2 to 5.5
1
INT4(P20 to P23),
INT5(P24 to P27)
tPIH(2)
INT3(P73) when
• Interrupt source flag can be set.
tPIL(2)
noise filter time
• Event inputs for timer 0 are
2.2 to 5.5
2
constant is 1/1
enabled.
tPIH(3)
INT3(P73) when
• Interrupt source flag can be set.
tPIL(3)
noise filter time
• Event inputs for timer 0 are
2.2 to 5.5
64
constant is 1/32
enabled.
tPIH(4)
INT3(P73) when
• Interrupt source flag can be set.
tPIL(4)
noise filter time
• Event inputs for timer 0 are
2.2 to 5.5
256
constant is 1/128
enabled.
tPIL(5)
RES
Resetting is enabled.
2.2 to 5.5
200
unit
tCYC
μs
AD Converter Characteristics at Ta = -30°C to +70°C, VSS1 = VSS2 = VSS3 = 0V
Parameter
Resolution
Absolute
accuracy
Conversion
time
Symbol
N
ET
TCAD
Pin/Remarks
AN0(P80) to
AN6(P86),
AN8(P70),
AN9(P71),
AN10(XT1),
AN11(XT2)
Conditions
(Note 6-1)
AD conversion time=32 × tCYC
(when ADCR2=0) (Note 6-2)
VDD [V]
3.0 to 5.5
3.0 to 5.5
4.5 to 5.5
Specification
min
typ
max
unit
8
bit
±1.5 LSB
15.68
(tCYC=
0.49μs)
97.92
(tCYC=
3.06μs)
23.52
97.92
AD conversion time=64 × tCYC
3.0 to 5.5
(tCYC=
0.735μs)
18.82
(tCYC=
3.06μs)
μs
97.92
(when ADCR2=1) (Note 6-2)
4.5 to 5.5
(tCYC=
(tCYC=
0.294μs)
1.53μs)
47.04
97.92
3.0 to 5.5
(tCYC=
0.735μs)
(tCYC=
1.53μs)
Analog input
voltage range
VAIN
3.0 to 5.5
VSS
VDD
V
Analog port
input current
IAINH
IAINL
VAIN=VDD
VAIN=VSS
3.0 to 5.5
3.0 to 5.5
-1
1
μA
Note 6-1: The quantization error (±1/2LSB) is excluded from the absolute accuracy value.
Note 6-2: The conversion time refers to the interval from the time the instruction for starting the converter is issued
till the time the complete digital value corresponding to the analog input value is loaded in the required
register.
No.A0125-17/23