LA76850 Datasheet, PDF (17/31 Pages) Sanyo Semicon Device – Monolithic Linear IC Black & White Television IC

LA76850
Deflection Block Test Conditions
Input signal
Horizontal free-running
frequency
Symbol
fH
Test point
22
Input signal
Y IN:
No signal
Horizontal output
pulse length
Hduty
Horizontal output pulse
saturation voltage
V Hsat
Vertical free-running
period 50 (PAL)
Vertical free-running
period 60 (NTSC)
VFR50
VFR60
Y IN:
22
Horizontal/
vertical sync
signal
PAL
Y IN:
22
Horizontal/
vertical sync
signal
PAL
Y IN:
18
No signal
Test method
Connect a frequency counter to the output of pin
22 (H out) and measure the horizontal free-running
frequency.
Measure the voltage for the pin 22 horizontal
output pulse’s low-level period.
Bus conditions
Measure the voltage for the pin 22 horizontal
output pulse’s low-level period.
Measure the vertical output period T at pin 18
T×15.625kHz (PAL)
T×15.734kHz (NTSC)
Vertical output
2.5V
CDMODE: 001
(PAL)
CDMODE: 002
(NTSC)
T
Horizontal output pulse
HPHCEN
(PAL)
(NTSC)
Y IN:
Measure the delay time from to the rise of the pin
22
Horizontal/
22 horizontal output pulse to the fall of the Y IN
vertical sync horizontal sync signal.
signal
28
PAL
HPHCEN
NTSC
20IRE
Horizontal position
adjustment range
HPHrange
Horizontal output
2.5V
Y IN:
With H PHASE: 0 and 31, measure the delay time H PHASE: 00000
22
Horizontal/
from the rise of the pin 22 horizontal output pulse H PHASE: 11111
vertical sync to the fall of the Y IN horizontal sync signal and
signal
28
PAL
calculate the difference from H PHCEN.
Measuring
20IRE
Horizontal output
2.5V
Continued on next page.
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