LC87F1HC4A Datasheet, PDF (16/27 Pages) Sanyo Semicon Device – CMOS IC 128K-byte FROM and 12288-byte RAM integrated 8-bit 1-chip Microcontroller with USB-host controller

Continued from preceding page.
Parameter
Symbol
Data setup time
tsDI(1)
Data hold time
thDI(1)
LC87F1HC4A
Pin/
Remarks
SB0(P11),
SI0(P11)
Conditions
• Must be specified with respect
to rising edge of SIOCLK.
• See Fig. 8.
VDD[V]
2.7 to 5.5
Output delay
time
tdD0(1)
tdD0(2)
tdD0(3)
SO0(P10),
SB0(P11)
• Continuous data transfer mode
• (Note 4-1-3)
• Synchronous 8-bit mode
• (Note 4-1-3)
(Note 4-1-3)
2.7 to 5.5
Specification
min
typ
max
unit
0.03
0.03
(1/3)tCYC
+0.05
μs
1tCYC
+0.05
(1/3)tCYC
+0.05
Note 4-1-3: Must be specified with respect to falling edge of SIOCLK.
Must be specified as the time to the beginning of output state change in open drain output mode. See Fig. 8.
2. SIO1 Serial I/O Characteristics (Note 4-2-1)
Parameter
Frequency
Symbol
tSCK(3)
Pin/
Remarks
SCK1(P15)
Conditions
See Fig. 8.
Low level
pulse width
High level
pulse width
Frequency
Low level
pulse width
High level
pulse width
Data setup time
Data hold time
tSCKL(3)
tSCKH(3)
tSCK(4)
tSCKL(4)
tSCKH(4)
tsDI(2)
thDI(2)
SCK1(P15)
• When CMOS output type is
selected
• See Fig. 8.
SB1(P14),
SI1(P14)
• Must be specified with respect
to rising edge of SIOCLK.
• See Fig. 8.
VDD[V]
2.7 to 5.5
2.7 to 5.5
min
2
Specification
typ
max
1
1
2
1/2
1/2
0.03
2.7 to 5.5
0.03
unit
tCYC
tSCK
Output delay time tdD0(4)
SO1(P13), • Must be specified with respect
μs
SB1(P14)
to falling edge of SIOCLK.
• Must be specified as the time
to the beginning of output state
change in open drain output
2.7 to 5.5
(1/3)tCYC
+0.05
mode.
• See Fig. 8.
Note 4-2-1: These specifications are theoretical values. Margins must be allowed according to the actual operating
conditions.
No.A0955-16/27