LC74786 Datasheet, PDF (15/23 Pages) Sanyo Semicon Device – On-Screen Display Controller

LC74786, 74786M, 74786JM
COMMAND6 (Synchronizing signal detection setup command)
• First byte
DA
Register
0 to 7
7
—
6
—
5
—
4
—
Contents
State
Function
1
1 Command 6 identification code.
1 Sets up synchronizing signal control.
0
0
3
SEL0
1
0
2
MOD0
1
SEL0
0
0
1
1
MOD
0
1
0
1
SEP_OUT output
Sync separator signal
Low-level output
High-level output
ST pulse signal
0 12 lines
1
DISLIN
1 10 lines
0 Normal output
0
MUT
1 CV_IN is cut and CV_OUT is held at the pedestal level
Notes
Switches the SEP_OUT (pin 19) output
Switches the number of lines displayed
CV_OUT switching
• Second byte
DA
0 to 7
7
6
5
4
3
2
1
0
Register
—
RN2
RN1
RN0
SN3
SN2
SN1
SN0
Contents
State
Function
0 Second byte identification bit
0
1
RN2
RN1
RN0 Number of times HSYNC detected
0
0
0
0
0
0
1
1
0
1
0
0
1
0
0
1
0 times
4 times
8 times
16 times
0
1
SN3 SN2 SN1 SN0 Number of times HSYNC detected
0
0
0
0
0
Not detected
1
0
0
0
1
32 times
0
0
0
1
0
64 times
1
0
1
0
0
128 times
0
1
0
0
0
256 times
1
Note: All registers are set to 0 when the LC74786/M/JM is reset by the RST pin.
Notes
External synchronizing signal detection control
Signal absent → signal present transition detection
Sets the sampling period in which SYNC can be
detected continuously in the horizontal synchronizing
signal period (1H).
External synchronizing signal detection control
Signal present → signal absent transition detection
Sets the sampling period in which SYNC cannot be
detected continuously in the horizontal synchronizing
signal period (1H).
No. 5729-15/23