LC75742E Datasheet, PDF (14/18 Pages) Sanyo Semicon Device – 1/2 Duty VFD Driver with Key Input Function

LC75742E, LC75742W
Block States during the Reset Period (when BLK is low)
• Divider and timing generator
These circuits are reset and their base clock is stopped.
• Dimmer timing generator
The circuit is reset and its operation is stopped.
• Digit and segment drivers
These circuits are reset and the display is turned off (S1 to S41 and G1 and G2 are set low.)
• Key scan
The circuit is reset, its internal circuits are set to the initial state, and key scanning is disabled.
• Key buffer
The circuit is reset and all data is set to 0.
• Clock generator
The state (normal or sleep mode) of this block (the clock oscillator circuit) is determined after the sleep control data
(S0 and S1) is transferred.
• CCB interface, shift register, control register, latch, and multiplexer
These circuits are not reset so that serial data can be input during the reset period.
DIGIT
DRIVER
SEGMENT DRIVER
TIMING
GENERATOR
DIVIDER
DIMMER
TIMING
GENERATOR
KEY BUFFER
KEY SCAN
: Blocks that are reset.
No. 6142-14/18