LV4150W Datasheet, PDF (12/26 Pages) Sanyo Semicon Device – Bi-CMOS LSI For LCD Panel Drive Single Chip IC

Continued from preceding page.
Pin No.
56
RESET
57
SYNC IN
58
VSEP TC
59
VDIN
60
HDIN
61
TEST1
62
TEST2
63
CLPIN
64
GND1
Pin Name
LV4150W
I/O
Pin Description
I
System reset
I
Sync signal input (composite)
O
Time constant pin for separation of vertical sync
I
VSYNC input
I
CSYNC/HSYNC input
I
Test pin 1
I
Test pin 2
I
External clamp input
-
Analog 3V power supply
Analog pin function description
Pin No.
Pin Name
Pin Voltage
33
SHIN
-
Pin Description
Input pin for test
Normally, connect to the ground for use.
34
CSVO
35
CSHO
-
Vertical and horizontal inversion control
output pin. Output is made from the open
collector. Connect a resistor to CSVO and
CSHO pins of the panel power supply. The
resistance must comply with the panel
specification.
36
FBCOM
1.5V
Feedback circuit smoothing capacitor pin for
41
FBR
control of antipole output DC level and RGB
44
FBG
output DC level.
46
FBB
Because of high impedance, a capacitor with
small leakage is used.
37
GNDCOM
0V
Ground pin of antipole output
38
COMOUT
2.6 to 3.55V Antipole AC output pin that can adjust the
output DC voltage with variable resistor of
serial bus. When the signal output DC voltage
has been changed to VCC2/2 and
VCC2*21/51 with the serial bus and the
voltage has been applied to SIC.C from the
outside, the DC voltage of antipole output
follows.
39
VCCCOM
7V
Power pin of antipole output
Equivqlent Circuit
1kΩ
33
VSS2
VDD2 _10kΩ
40kΩ
10kΩ
VCC2
34
35
GND2
VCC1
36
41
44
46 _GND1
1kΩ
1kΩ
1kΩ
100kΩ
150Ω
20Ω
VCCCOM
38
GNDCOM
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No.8930-12/26