LE24CB642_10 Datasheet, PDF (12/12 Pages) Sanyo Semicon Device – Two Wire Serial Interface EEPROM (64k EEPROM)

LE24CB642
A. If it is not possible to satisfy the instruction 1 in Note above, and SDA is set to low during power rise
After the power has stabilized, the SCL and SDA pins must be controlled as shown below, with both pins set to high.
VDD
SCL
tLOW
VDD
SCL
SDA
SDA
tDH
tSU.DAT
tSU.DAT
B. If it is not possible to satisfy the instruction 2 in Note above
After the power has stabilized, software reset must be executed.
C. If it is not possible to satisfy the instructions both 1 and 2 in Note above
After the power has stabilized, the steps in A must be executed, then software reset must be executed.
5) Noise filter for the SCL and SDA pins
This product contains a filter circuit for eliminating noise at the SCL and SDA pins. Pulses of 50ns or less are not
recognized because of this function.
6) Function to inhibit writing when supply voltage is low
This product contains a supply voltage monitoring circuit that inhibits inadvertent writing below the guaranteed
operating supply voltage range. The data is protected by ensuring that write operations are not started at voltages
(typ.) of 1.3V and below.
7) Slave address setting
This product does not include a slave address pin, but the information for the slave addresses, S0, S1 and S2, are
held internally. The slave addresses of this product are set to S0=0, S1=0, and S2=0 when it is shipped. During
device addressing, execute this slave address code after the device code.
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PS No.1330-12/12