LB11691H Datasheet, PDF (12/21 Pages) Sanyo Semicon Device – Monolithic digital IC Pre-Driver IC for Brushless Motor Drive in Electric Bicycles

Description of LB11691H
LB11691H
1. Output drive circuit
This IC is designed on the prerequisite that NchFET is used for both upper and lower outputs. To minimize power loss
at the output, the direct PWM drive method is used. Output Tr is normally saturated at ON and the motor drive power is
adjusted by changing the ON-duty of the output. PWM switching of the output is made on the lower output side to
which UL, VL, and WL pins are connected. Diode built into the upper output FET on the non-PWM side should be
selected with care because the reverse recovery time is important (the through current flows in an instant when the
PWM side Tr is turned ON if the diode with the short reverse recovery time is not used).
Near each three-phase output FET, provide a capacitor to prevent
For oscillation prevention
high-frequency oscillation (about 0.1μF) because of substrate pattern
routing.
To VCC
If the switching speed of FET is so high as to cause a problem, insert UH pin
a series resistor to the gate to adjust the speed. Through current may
flow if the ON speed of lower FET on the PWM side is too fast.
UOUT pin
To motor coil
However, insertion of excessively large resistor in the gate may make
the gate waveform dull and the gate voltage may be deficient when
UL pin
the PWM on-duty is small, resulting in heat generation or damage of
the lower FET. The same phenomena occur if the FET gate capacity
Means against
through current
To RF
is large even when the resistor has not been inserted. In this case, it is
necessary to limit the minimum duty to be used by taking into account ASO of the switching element to be used.
Depending on FET to be used, the through current may flow when the PWM on-duty is small. As a countermeasure, a
capacitor may be inserted between the gate and source of upper FET. Note that insertion of a capacitor with excessively
high capacitance may delay switching too much, resulting in heat generation in the upper FET.
2. Current limiting circuit
The current limiting circuit limits the current to the value determined by I = VRF/Rf (VRF = 0.1Vtyp, Rf : current
detection resistance) (that is, the peak current is limited). Current is limited by decreasing on-duty of the output.
Connection of RF and RFGND pins to both ends near the current detection
resistor ensures operation with the correct current limiting value.
3kΩ
RF pin
When the current detection resistor with extremely small resistance is to be
1kΩ
used, the pattern design must be such as to ensure the equal wiring resistance
component by substrate pattern for all phases as much as possible. If the
RFGND pin
Current
detectiom
resistor
wiring resistance component varies among phases, the current limit value
fluctuates each time the shift is changed, resulting in vibration or noise in the
motor.
The reference voltage has been set to 0.1Vtyp to minimize the power of
RF pin
current detection resistor. In certain applications, enter the voltage divided by
the resistor into RF pin when the current detection resistance is to be increased. _{RFGND pin}
For the resistance ratio shown in the figure right, the detection current value
Current
detectiom
resistor
may be increased by about four times.
The current limiting circuit has a filter circuit so that erroneous current limiting is not made when the circuit detects the
reverse recovery current of the output diode because of PWM operation. In the normal application, the internal filter
circuit is allowed. If erroneous limiting occurs (if the reverse recovery current of diode flows for 1μS or more), it is
necessary to add the external filter circuit (R and C low-path filter). Note also that excessive delay may cause delay in
detection of current limiting.
3. PWM oscillation circuit
The PWM frequency is determined from a capacitor capacity C (F) to be connected to the PWM pin :
fPWM ≈ 1/ (102000×C)
Connection of a 270pF capacitor causes oscillation of about 36kHz. Excessively low PWM frequency causes a
switching sound from the motor while excessively high PWM frequency causes increase in the power loss at output.
Therefore, the PWM frequency of about 20k to 50kHz would be acceptable. Wire GND of a capacitor to be connected
as much near as possible to the GND pin of IC to prevent effects of output noise.
No.8314-12/21