LA76835NM_07 Datasheet, PDF (12/50 Pages) Sanyo Semicon Device – Monolithic Linear IC For PAL/NTSC Color Television Sets VIF/SIF/Y/C/Deflection Implemented in a Single Chip

VIF Block Test Conditions
Input signal
Maximum RF AGC
voltage
Symbol
VRFH
Minimum RF AGC
voltage
VRFL
RF AGC (@DAC
Delay Pt = 0)
(@DAC
= 63)
Input sensitivity
RFAGC0
RFAGC63
Vi
No-signal
video output voltage
Sync signal tip level
Von
Votip
Video output
Vo
amplitude
Video S/N
S/N
C-S beat level
IC-S
Differential gain
DG
Differential phase
DP
Maximum AFT
output voltage
Minimum AFT
output voltage
AFT detection sensitiv-
ity
VAFTH
VAFTL
VAFTS
APC pull-in
range (U), (L)
fPU, fPL
LA76835NM
Test point
77
77
Input signal
SG1
80dBµ
Test method
Measure the DC voltage at pin 77.
SG1
80dBµ
Measure the DC voltage at pin 77.
Bus conditions
RF.AGC = "000000"
RF.AGC = "111111"
SG1
77
Obtain the input level at which the DC voltage at
pin 77 becomes 4.5V.
RF.AGC = "000000"
Obtain the input level at which the DC voltage at RF.AGC = "111111"
pin 77 becomes 4.5V.
SG6
56
Using an oscilloscope, observe the level at pin 56
and obtain the input level at which the waveform's
p-p value becomes 1.0Vp-p.
No signal
Set IF AGC = “1” and measure the DC voltage at IF.AGC = “1”
56
pin 56.
SG1
56
80dBµ
Measure the DC voltage at pin 56.
SG6
56
80dBµ
Using an oscilloscope, observe the level at pin 56
and measure the waveform’s p-p value.
SG1
56
80dBµ
SG1
56
SG2
SG3
SG5
56
80dBµ
Measure the noise voltage at pin 56 with an RMS
voltmeter through a 10kHz to 4.2MHz band-pass
filter. ···· Vsn
20Log (1.0/Vsn)
Input a 80dBµ SG1 signal and measure the DC
voltage (V76) at pin 76. Mix SG1 = 74dBµ, SG2 =
69dBµ, and SG3 = 49dBµ to enter the mixture in
the VIF IN. Apply V76 to pin 76 from an external
DC power supply. Using a spectrum analyzer,
measure the difference between pin 56’s 3.58MHz
component and 920kHz component.
Using a vector scope, measure the level at pin 56.
SG5
56
80dBµ
Using a vector scope, measure the level at pin 56.
SG4
7
80dBµ
Set and input the SG4 frequency to 44.75MHz.
Measure the DC voltage at pin 7 at that moment.
SG4
Set and input the SG4 frequency to 46.75MHz.
7
80dBµz
Measure the DC voltage at pin 7 at that moment.
SG4
Adjust the SG4 frequency and measure frequency
7
80dBµz
deviation ∆f when the DC voltage at pin 7 changes
from 1.5V to 3.5V.
VAFTS = 2000/∆f [mV/kHz]
SG4
56
80dBµ
Connect an oscilloscope to pin 56 and adjust the
SG4 frequency to a frequency higher than
45.75MHz to bring the PLL into unlocked mode.
(A beat signal appears.) Lower the SG4 frequency
and measure the frequency at which the PLL locks
again. In the same manner, adjust the SG4 fre-
quency to a lower frequency to bring the PLL into
unlocked mode. Higher the SG4 frequency and
measure the frequency at which the PLL locks
again.
No.7962-12/50