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LE28F4001CTS Datasheet, PDF (1/15 Pages) Sanyo Semicon Device – 4M-Bit (512k × 8) Flash EEPROM
Preliminary Specifications
CMOS LSI
LE28F4001CTS-12
4M-Bit (512k × 8) Flash EEPROM
Features
CMOS Flash EEPROM Technology
Single 5-Volt Read and Write Operations
Sector Erase Capability: 256 Bytes per sector
Fast Access Time: 120 ns
Low Power Consumption
Active Current(Read): 25 mA (Max.)
Standby Current: 20 µA (Max.)
High Read/Write Reliability
Sector-write Endurance Cycles: 104
10 Years Data Retention
Latched Address and Data
Self-timed Erase and Programming
Byte Programming: 40µs (Max.)
End of Write Detection:Toggle Bit/ DATA Polling
Hardware/Software Data Protection
JEDEC Standard Byte-Wide EEPROM Pinouts
Packages Available
LE28F4001CTS: 32-pin TSOP Normal(8×14mm)
Product Description
The LE28F4001C is a 512K ×8 CMOS sector erase, byte
program EEPROM. The LE28F4001C is manufactured
using SANYO's proprietary, high performance CMOS Flash
EEPROM technology. Breakthroughs in EEPROM cell
design and process architecture attain better reliability and
manufacturability compared with conventional approaches.
The LE28F4001C erases and programs with a 5-volt only
power supply. LE28F4001C conforms to JEDEC standard
pinouts for byte wide memories and is compatible with
existing industry standard EPROM, flash EPROM and
EEPROM pinouts.
program or data memory. For all system applications, the
LE28F4001C significantly improves performance and
reliability, while lowering power consumption when
compared with floppy diskettes or EPROM approaches.
EEPROM technology makes possible convenient and
economical updating of codes and control programs on-line.
The LE28F4001C improves flexibility, while lowering the
cost, of program and configuration storage applications.
Figure 1 shows the pin assignments for the 32 lead
Plastic TSOP packages. Figure 2 shows the functional block
diagram of the LE28F4001C. Pin description and operation
modes can be found in Tables 1 through 3.
Featuring high performance programming, the
LE28F4001C typically byte programs in 30µs. The
LE28F4001C typically sector (256 bytes) erases in 2ms. Both
program and erase times can be optimized using interface
feature such as Toggle bit or DATA Polling to indicate the
completion of the write cycle. To protect against an
inadvertent write, the LE28F4001C has on chip hardware and
software date protection schemes. Designed, manufactured,
and tested for a wide spectrum of applications, the
LE28F4001C is offered with a guaranteed sector write
endurance of 104 cycles. Data retention is rated greater then
10 years.
The LE28F4001C is best suited for applications that
require reprogrammable nonvolatile mass storage of
Device Operation
Commands are used to initiate the memory operation
functions of the device. Commands are written to the device
using standard microprocessor write sequences. A command
is written by asserting WE low while keeping CE low.
The address bus is latched on the falling edge of WE , CE ,
whichever occurs last. The data bus is latched on the rising
edge of WE , CE , whichever occurs first. However, during
the software write protection sequence the address are
latched on the rising edge of OE or CE , whichever occurs
first.
*This product incorporate technology licensed from Silicon Storage Technology, Inc.
This preliminary specification is subject to change without notice.
SANYO Electric Co., Ltd. Semiconductor Company
1-1, 1 Chome, Sakata, Oizumi-machi, Ora-gun, GUNMA, 370-0596 JAPAN
Revision 2.20-February 23,2001-AY/ay-1/14