LC89950 Datasheet, PDF (1/5 Pages) Sanyo Semicon Device – 1H Delay Line for PAL Systems

Ordering number : EN*5440
MOS LSI
LC89950
1H Delay Line for PAL Systems
Preliminary
Overview
The LC89950 is an IC that provides 1H delay processing
for color difference signals used in PAL and SECAM
format TV. The LC89950 has two CCD systems, one for
the R-Y and one for the B-Y signal, and drives these
CCDs with a 4-MHz clock generated within the IC. It uses
a sandcastle-shaped three-value input clock with a 1 H (64
µs) period.
Features
• 5-V single-voltage power supply
• Two input and output systems, one each for R-Y and B-
Y signals
• Takes a sandcastle pulse (SCP) as the input clock, and
converts that to a burst gate pulse (BGP) signal
internally.
• Generates the CCD drive pulses (4 MHz) from the input
clock using a PLL circuit.
• Uses BGP as clamp pulses and clamps the no signal
section (back porch) once every horizontal scan period.
• The output signal is in-phase with the input signal
• Auto-bias and input clamping circuits
• 4-MHz output circuit
Package Dimensions
unit: mm
3003A-DIP14
[LC89950]
SANYO: DIP14
Functions
• Two on-chip 254.5-bit CCD shift registers
• CCD drive circuits
• Sample-and-hold circuit
• Burst gate pulse detection circuit
• 256 × PLL circuit
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
V_DD
Pd max
Topr
Tstg
Conditions
Ratings
Unit
–0.3 to +6.0
V
450
mW
–10 to +60
°C
–55 to +125
°C
Allowable Operating Ranges at Ta = 25°C
Parameter
Supply voltage
Input signal amplitude
Symbol
V_DD
V_INPP(R-Y)
V_INPP(B-Y)
Conditions
min
typ
max
Unit
4.75
5.0
5.25
V
500
700
mV
500
700
mV
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
D3097HA(OT) No. 5440-1/5