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SCM1200MF Datasheet, PDF (23/60 Pages) Sanken electric – 500V / 600V High Voltage Three-phase Motor Driver ICs
SCM1200MF Series
12. Functional Descriptions
All the characteristic values given in this section are
typical values, unless they are specified as minimum or
maximum.
For pin descriptions, this section employs a notation
system that denotes a pin name with the arbitrary letter
“x”, depending on context. The U, V, and W phases are
represented as the pin numbers 1, 2, and 3, respectively.
Thus, “(the) VBx pin” is used when referring to either of
the VB1, VB2, or VB3 pin. Also, when different pin
names are mentioned as a pair (e.g., “the VBx and HSx
pins”), they are meant to be the pins in the same phase.
12.1. Turning On and Off the IC
The procedures listed below provide recommended
startup and shutdown sequences.
To turn on the IC properly, do not apply any voltage
on the VBB, HINx, and LINx pins until the logic power
supply, VCC, has reached a stable state (VCC(ON) ≥ 12.5
V). It is required to charge bootstrap capacitors, CBOOT,
up to full capacity at startup (see Section 12.2.2).
To turn off the IC, set the HINx and LINx pins to
logic low (or “L”), and then decrease the VCCx pin
voltage.
12.2. Pin Descriptions
12.2.1. U, V, and W
These pins are the outputs of the three phases, and
serve as connection terminals to the three-phase motor.
The U, V, and W pins are internally connected to the
HS1, HS2, and HS3 pins, respectively.
12.2.2. VB1, VB2, and VB3
These are the inputs of the high-side floating power
supplies for the individual phases.
Voltages across the VBx and HSx pins should be
maintained within the recommended range (i.e., the
Logic Supply Voltage, VBS) given in Section 2.
In each phase, a bootstrap capacitor, CBOOT, should be
connected between the VBx and HSx pins.
For proper startup, turn on the low-side transistor first,
then charge the bootstrap capacitor, CBOOT, up to its
maximum capacity.
Satisfying the formulas below can provide optimal
capacitance for the bootstrap capacitors, CBOOT. Note
that whichever resulting value is larger should be chosen
in order to deal with capacitance tolerance and DC bias
characteristics.
(1)
(2)
In Formula (1), let TL(OFF) be the maximum off-time
of the low-side transistor, measured in seconds, with the
charging time of CBOOT excluded.
Even during the high-side transistor is not on, voltage
on the bootstrap capacitor keeps decreasing due to
power dissipation in the IC. When the VBx pin voltage
decreases to VBS(OFF) or less, the high-side undervoltage
lockout (UVLO_VB) starts operating (see Section
12.3.3.1). Therefore, actual board testing should be done
thoroughly to validate that voltage across the VBx pin
maintains over 12.0 V (VBS > VBS(OFF)) during a
low-frequency operation such as a startup period.
As shown in Figure 12-1, in each phase, a bootstrap
diode, DBOOT, and a current-limiting resistor, RBOOT, are
placed in series between the VCCx and the VBx pins.
The charging time of CBOOT, tC, is given by Formula
(3):
(3)
where CBOOT is the optimized capacitance of the
bootstrap capacitor, and RBOOT is the resistance of the
current-limiting resistor (22 Ω ± 20 %).
U1
DBOOT1 RBOOT1
VCC
6
HO
VCC1
MIC1
4
COM1
LO
VB1
7
CP
HS1
8
31
VBB
CBOOT1
32
U Mortor
CDC VDC
LS1
33
RS1
Figure 12-1. Bootstrap circuit
Figure 12-2 shows an internal level-shifting circuit
that produces high-side output signals, HOx. A high-side
output signal, HOx, begins to respond when an input
signal, HINx, transits from low to high (rising edge) or
high to low (falling edge). And a signal triggered on a
rising edge is called “Set”, whereas a signal triggered on
a falling edge is called “Reset”. Either of these two
signals, Set or Reset, is then transmitted to the high-side
by the level-shifting circuit. Finally, the SR flip-flop
circuit feeds an output signal, Q (i.e., HOx).
Figure 12-3 is a timing diagram describing how noise
or other detrimental effects will improperly influence the
SCM1200MF-DSJ Rev.1.1
SANKEN ELECTRIC CO.,LTD.
23
Feb. 19, 2016
http://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO.,LTD. 2015