SRDA05-4.TBT Datasheet, PDF (1/11 Pages) Samtec, Inc – RAILCLAMP LOW CAPACITANCE TVS DIODE ARRAY

PROTECTION _{PRODUCTS - RailClamp}^®
Description
RailClamps are surge rated diode arrays designed to
protect high speed data interfaces. The SRDA series
has been specifically designed to protect sensitive
components which are connected to data and trans-
mission lines from overvoltage caused by electrostatic
discharge (ESD), electrical fast transients (EFT), and
lightning.
The unique design incorporates surge rated, low
capacitance steering diodes and a TVS diode in a
single package. During transient conditions, the
steering diodes direct the transient current to ground
via the internal low voltage TVS. The TVS diode clamps
the transient voltage to a safe level. The low capaci-
tance array configuration allows the user to protect up
to four high-speed data lines. The SRDA05-4 may be
used to protect lines operating up to 5 volts while the
SRDA12-4 may be used on lines operating up to 12
volts.
These devices are in a 8-pin SOIC package. They are
available with a SnPb or RoHS/WEEE compliant matte
tin lead finish. The high surge capability (Ipp=25A,
tp=8/20μs) means it can be used in high threat
environments in applications such as CO/CPE equip-
ment, telecommunication lines, and video lines.
SRDA05-4 and SRDA12-4
RailClamp^®
Low Capacitance TVS Diode Array
Features
‹ Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 24A (8/20μs)
‹ Array of surge rated diodes with internal TVS diode
‹ Protects four I/O lines
‹ Low capacitance (<15pF) for high-speed interfaces
‹ Low operating and clamping voltages
‹ Solid-state technology
Mechanical Characteristics
‹ JEDEC SOIC-8 package
‹ Lead Finish: SnPb or Matte Sn
‹ Molding compound flammability rating: UL 94V-0
‹ Marking : Part number, date code, logo
‹ Packaging : Tape and Reel per EIA 481
Applications
‹ USB Power and Data Line Protection
‹ T1/E1 secondary IC Side Protection
‹ T3/E3 secondary IC Side Protection
‹ HDSL, SDSL secondary IC Side Protection
‹ Video Line Protection
‹ Microcontroller Input Protection
‹ Base stations
‹ I²C Bus Protection
Circuit Diagram
Schematic and PIN Configuration
REF1
I/O 1
I/O 2
I/O 3
I/O 4
REF2
Revision 8/21/07
I/O 1 1
REF 1 2
REF 1 ³
I/O 2 4
1
8 REF 2
S0-8 (Top View)
7 I/O 4
6 I/O 3
5 REF 2
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