S3C8075 Datasheet, PDF (86/208 Pages) Samsung semiconductor – SAM87 family of 8-bit single-chip CMOS microcontrollers, 272-byte general purpose register area, 16-Kbyte internal program memory

S3C8075/P8075
INTERRUPT STRUCTURE
SYSTEM MODE REGISTER (SYM)
The system mode register, SYM (set 1, DEH), is used to globally enable and disable interrupt processing and to
control fast interrupt processing. Figure 5-5 shows the effect of the various control settings.
A reset clears SYM.7, SYM.1, and SYM.0 to "0" and the other SYM bit values (for fast interrupt level selection)
are undetermined.
The instructions EI and DI enable and disable global interrupt processing, respectively, by modifying the bit 0
value of the SYM register. An Enable Interrupt (EI) instruction must be included in the initialization routine, which
follows a reset operation, in order to enable interrupt processing. Although you can manipulate SYM.0 directly to
enable and disable interrupts during normal operation, we recommend using the EI and DI instructions for this
purpose.
MSB ^.7
System Mode Register (SYM)
DEH, Set 1, R/W
.6
.5
.4
.3
.2
.1
.0 _LSB
Not used
External interface tri-state
enable bit:
0 = Normal operation
(Tri-state disabled)
1 = High inpedence
(Tri-state enabled)
Fast interrupt level
selection bits:
000
001
010
100
101
11 0
111
IRQ0
IRQ1
IRQ2
IRQ4
IRQ5
IRQ6
IRQ7
Global interrupt enable bit:
0 = Disable all interrupts
1 = Enable all interrupts
Fast interrupt enable bit:
0 = Disable fast interrupts
1 = Enable fast interrupts
Figure 5-5. System Mode Register (SYM)
5-9