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S3C72G9 Datasheet, PDF (76/96 Pages) Samsung semiconductor – The S3C72G9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable M
   
 
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PUSH
Operation:
src
Operand
RR
SB
Operation Summary
Push register pair onto stack
Push SMB and SRB values onto stack
Bytes
1
2
Cycles
1
2
Description: The SP is then decreased by two and the contents of the source operand are copied into the RAM
location addressed by the stack pointer, thereby adding a new element to the top of the stack.
Operand
RR
SB
Binary Code
Operation Notation
0 0 1 0 1 r2 r1 1 (SP-1) ← RR;, (SP-2) ← RR&
SP ← SP-2
1 1 0 1 1 1 0 1 (SP-1) ← SMB, (SP-2) ← SRB;
(SP) ← SP-2
01100111
Example:
As an interrupt service routine begins, the stack pointer contains the value 0FAH and the data
pointer register pair HL contains the value 20H. The instruction
PUSH
HL
leaves the stack pointer set to 0F8H and stores the values 2H and 0H in RAM locations 0F9H and
0F8H, respectively.