K4S643232F- Datasheet, PDF (7/12 Pages) Samsung semiconductor – 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL3.3V

K4S643232F-TI/P
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = -40°C to 85°C, VIH(min)/VIL(max)=2.0V/0.8V)
Parameter
Operating Current
(One Bank Active)
Symbol
Test Condition
ICC1
Burst Length =1
tRC ≥ tRC(min), tCC ≥ tCC(min), Io = 0mA
CAS
Latency
3
2
Speed
-60
-70
130
130
110
Precharge Standby Current in ^ICC2P
CKE ≤ VIL(max), tCC = 15ns
2
power-down mode
ICC2PS
CKE & CLK ≤ VIL(max), tCC = ∞
2
Precharge Standby Current
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
12
in non power-down mode
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
7
Active Standby Current
ICC3P
CKE ≤ VIL(max), tCC = 15ns
4
in power-down mode
ICC3PS
CKE ≤ VIL(max), tCC = ∞
4
Active Standby Current
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns
Input signals are changed one time during 30ns
40
in non power-down mode
(One Bank Active)
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
35
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
ICC4
Io = 0 mA, Page Burst
All bank Activated, tCCD = tCCD(min)
ICC5
tRC ≥ tRC(min)
ICC6
CKE ≤ 0.2V
3
150
140
2
120
3
140
120
2
120
2
450
Unit Note
mA 2
mA
mA
mA
mA
mA 2
mA 3
mA 4
uA 5
Notes : _{1. Unless otherwise notes, Input level is CMOS(VIH/VIL=VDDQ/VSSQ) in LVTTL.}
2. Measured with outputs open.
3. Refresh period is 64ms.
4. K4S643232F-TI**
5. K4S643232F-TP**
Rev. 1.0 (Jan. 2002)
-7-