K6R1008V1D Datasheet, PDF (6/9 Pages) Samsung semiconductor – 64Kx16 Bit High-Speed CMOS Static RAM(3.3V Operating) Operated at Commercial and Industrial Temperature Ranges.

K6R1008V1D
WRITE CYCLE*
Parameter
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width(OE High)
Write Pulse Width(OE Low)
Write Recovery Time
Write to Output High-Z
Symbol
tWC
tCW
tAS
tAW
tWP
tWP1
tWR
tWHZ
K6R1008V1D-08
Min
Max
8
-
6
-
0
-
6
-
6
-
8
-
0
-
0
4
Data to Write Time Overlap
tDW
4
-
Data Hold from Write Time
tDH
0
-
End of Write to Output Low-Z
tOW
3
-
* The above parameters are also guaranteed at industrial temperature range.
CMOS SRAM
K6R1008V1D-10
Min
Max
10
-
7
-
0
-
7
-
7
-
10
-
0
-
0
5
5
-
0
-
3
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
Address
Data Out
tRC
tAA
tOH
Previous Valid Data
Valid Data
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS
UB, LB
OE
Data out
VCC
Current
High-Z
ICC
ISB
tRC
tAA
tCO
tBA
tBLZ(4,5)
tOE
tOLZ
tLZ(4,5)
tPU
50%
tHZ(3,4,5)
tBHZ(3,4,5)
tOHZ
Valid Data
tPD
50%
-6-
Revision 1.0
December 2001